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target/arm: Diagnose writeback register in list for LDM for v7

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Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN
value back to the base register.  Starting in v7 this is UNPREDICTABLE.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-09-04 12:30:19 -07:00 committed by Peter Maydell
parent c5c426d4c6
commit 3949f4675d
1 changed files with 9 additions and 0 deletions
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9
target/arm/translate.c
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@ -9997,6 +9997,15 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a)
static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a)
{
/*
* Writeback register in register list is UNPREDICTABLE
* for ArchVersion() >= 7. Prior to v7, A32 would write
* an UNKNOWN value to the base register.
*/
if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) {
unallocated_encoding(s);
return true;
}
return do_ldm(s, a);
}