target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly
The encodings 0,0,C7,C9,0 and 0,0,C7,C9,1 are AT SP1E1RP and AT S1E1WP, but our ARMCPRegInfo definitions for them incorrectly name them AT S1E1R and AT S1E1W (which are entirely different instructions). Fix the names. (This has no guest-visible effect as the names are for debug purposes only.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Fuad Tabba <tabba@google.com> Message-id: 20230130182459.3309057-2-peter.maydell@linaro.org Message-id: 20230127175507.2895013-2-peter.maydell@linaro.org
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@ -7734,11 +7734,11 @@ static const ARMCPRegInfo vhe_reginfo[] = {
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#ifndef CONFIG_USER_ONLY
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static const ARMCPRegInfo ats1e1_reginfo[] = {
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{ .name = "AT_S1E1R", .state = ARM_CP_STATE_AA64,
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{ .name = "AT_S1E1RP", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 9, .opc2 = 0,
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.access = PL1_W, .type = ARM_CP_NO_RAW | ARM_CP_RAISES_EXC,
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.writefn = ats_write64 },
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{ .name = "AT_S1E1W", .state = ARM_CP_STATE_AA64,
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{ .name = "AT_S1E1WP", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 9, .opc2 = 1,
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.access = PL1_W, .type = ARM_CP_NO_RAW | ARM_CP_RAISES_EXC,
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.writefn = ats_write64 },
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