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target-alpha: Tidy alpha_translate_init

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Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2014-03-28 08:05:33 -07:00
parent e566be049a
commit 39acc64741
1 changed files with 44 additions and 36 deletions
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80
target-alpha/translate.c
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@ -95,59 +95,67 @@ static TCGv cpu_sysval;
static TCGv cpu_usp;
#endif
/* register names */
static char cpu_reg_names[10*4+21*5 + 10*5+21*6];
#include "exec/gen-icount.h"
void alpha_translate_init(void)
{
#define DEF_VAR(V) { &cpu_##V, #V, offsetof(CPUAlphaState, V) }
typedef struct { TCGv *var; const char *name; int ofs; } GlobalVar;
static const GlobalVar vars[] = {
DEF_VAR(pc),
DEF_VAR(lock_addr),
DEF_VAR(lock_st_addr),
DEF_VAR(lock_value),
DEF_VAR(unique),
#ifndef CONFIG_USER_ONLY
DEF_VAR(sysval),
DEF_VAR(usp),
#endif
};
#undef DEF_VAR
/* Use the symbolic register names that match the disassembler. */
static const char greg_names[31][4] = {
"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
"t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
"t10", "t11", "ra", "t12", "at", "gp", "sp"
};
static const char freg_names[31][4] = {
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30"
};
static bool done_init = 0;
int i;
char *p;
static int done_init = 0;
if (done_init) {
return;
}
done_init = 1;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
p = cpu_reg_names;
for (i = 0; i < 31; i++) {
sprintf(p, "ir%d", i);
cpu_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, ir[i]), p);
p += (i < 10) ? 4 : 5;
sprintf(p, "fir%d", i);
cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, fir[i]), p);
p += (i < 10) ? 5 : 6;
offsetof(CPUAlphaState, ir[i]),
greg_names[i]);
}
cpu_pc = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, pc), "pc");
for (i = 0; i < 31; i++) {
cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, fir[i]),
freg_names[i]);
}
cpu_lock_addr = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, lock_addr),
"lock_addr");
cpu_lock_st_addr = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, lock_st_addr),
"lock_st_addr");
cpu_lock_value = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, lock_value),
"lock_value");
cpu_unique = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, unique), "unique");
#ifndef CONFIG_USER_ONLY
cpu_sysval = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, sysval), "sysval");
cpu_usp = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUAlphaState, usp), "usp");
#endif
done_init = 1;
for (i = 0; i < ARRAY_SIZE(vars); ++i) {
const GlobalVar *v = &vars[i];
*v->var = tcg_global_mem_new_i64(TCG_AREG0, v->ofs, v->name);
}
}
static TCGv load_zero(DisasContext *ctx)