Xen patches
- Xen PCI passthrough fixes -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE+AwAYwjiLP2KkueYDPVXL9f7Va8FAmLEQFMACgkQDPVXL9f7 Va9K8ggArmxiJ+g+RQtY8/D7MXjDTA3wfUFWytCAIxarbmxR3eVf5N3DnrP8Yak2 BX3UmCuZuwedkU11ZXKaMa9PM/tQOpZTWwai2tDuxw8AwjpW3iG4V1jXJ58BXZsM /81p1/1NqJhGacY1agdf4Yd0uJW+atxbo8/ejLOpmA8S9pHGDMRvSkRezrrOyQEG z8V9l1ZiAWeJCny98blhfY+RyJ7vj27xf0gBli/kpDwwm/wnxcD6geT3U7hNAwT6 gcw22u3cHHf9svGUP+X2Y4XpJI5hv4ZoKwVG5ogEkyPiT4eY3ApRzYSAwMtQesqR rLMpkOEwiGfSJzfHAtdHVconx7Q/fw== =lPaS -----END PGP SIGNATURE----- Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm into staging Xen patches - Xen PCI passthrough fixes # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEE+AwAYwjiLP2KkueYDPVXL9f7Va8FAmLEQFMACgkQDPVXL9f7 # Va9K8ggArmxiJ+g+RQtY8/D7MXjDTA3wfUFWytCAIxarbmxR3eVf5N3DnrP8Yak2 # BX3UmCuZuwedkU11ZXKaMa9PM/tQOpZTWwai2tDuxw8AwjpW3iG4V1jXJ58BXZsM # /81p1/1NqJhGacY1agdf4Yd0uJW+atxbo8/ejLOpmA8S9pHGDMRvSkRezrrOyQEG # z8V9l1ZiAWeJCny98blhfY+RyJ7vj27xf0gBli/kpDwwm/wnxcD6geT3U7hNAwT6 # gcw22u3cHHf9svGUP+X2Y4XpJI5hv4ZoKwVG5ogEkyPiT4eY3ApRzYSAwMtQesqR # rLMpkOEwiGfSJzfHAtdHVconx7Q/fw== # =lPaS # -----END PGP SIGNATURE----- # gpg: Signature made Tue 05 Jul 2022 07:14:51 PM +0530 # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [unknown] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * tag 'pull-xen-20220705' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm: xen/pass-through: don't create needless register group xen/pass-through: merge emulated bits correctly Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
39e19f5f67
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@ -1965,11 +1965,12 @@ static void xen_pt_config_reg_init(XenPCIPassthroughState *s,
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if ((data & host_mask) != (val & host_mask)) {
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uint32_t new_val;
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/* Mask out host (including past size). */
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new_val = val & host_mask;
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/* Merge emulated ones (excluding the non-emulated ones). */
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new_val |= data & host_mask;
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/*
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* Merge the emulated bits (data) with the host bits (val)
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* and mask out the bits past size to enable restoration
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* of the proper value for logging below.
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*/
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new_val = XEN_PT_MERGE_VALUE(val, data, host_mask) & size_mask;
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/* Leave intact host and emulated values past the size - even though
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* we do not care as we write per reg->size granularity, but for the
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* logging below lets have the proper value. */
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@ -2031,12 +2032,16 @@ void xen_pt_config_init(XenPCIPassthroughState *s, Error **errp)
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}
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}
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/*
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* By default we will trap up to 0x40 in the cfg space.
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* If an intel device is pass through we need to trap 0xfc,
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* therefore the size should be 0xff.
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*/
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if (xen_pt_emu_reg_grps[i].grp_id == XEN_PCI_INTEL_OPREGION) {
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if (!is_igd_vga_passthrough(&s->real_device) ||
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s->real_device.vendor_id != PCI_VENDOR_ID_INTEL) {
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continue;
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}
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/*
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* By default we will trap up to 0x40 in the cfg space.
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* If an intel device is pass through we need to trap 0xfc,
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* therefore the size should be 0xff.
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*/
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reg_grp_offset = XEN_PCI_INTEL_OPREGION;
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}
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