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fw_cfg: convert to qdev

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Convert fw_cfg to qdev.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2010-06-27 16:04:55 +00:00
parent 738012bec4
commit 3a5c16fcb8
1 changed files with 60 additions and 20 deletions
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80
hw/fw_cfg.c
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@ -25,6 +25,7 @@
#include "sysemu.h"
#include "isa.h"
#include "fw_cfg.h"
#include "sysbus.h"
/* debug firmware config */
//#define DEBUG_FW_CFG
@ -46,6 +47,8 @@ typedef struct FWCfgEntry {
} FWCfgEntry;
struct FWCfgState {
SysBusDevice busdev;
uint32_t ctl_iobase, data_iobase;
FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
FWCfgFiles *files;
uint16_t cur_entry;
@ -158,9 +161,9 @@ static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = {
NULL,
};
static void fw_cfg_reset(void *opaque)
static void fw_cfg_reset(DeviceState *d)
{
FWCfgState *s = opaque;
FWCfgState *s = DO_UPCAST(FWCfgState, busdev.qdev, d);
fw_cfg_select(s, 0);
}
@ -323,27 +326,23 @@ int fw_cfg_add_file(FWCfgState *s, const char *dir, const char *filename,
FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
target_phys_addr_t ctl_addr, target_phys_addr_t data_addr)
{
DeviceState *dev;
SysBusDevice *d;
FWCfgState *s;
int io_ctl_memory, io_data_memory;
s = qemu_mallocz(sizeof(FWCfgState));
dev = qdev_create(NULL, "fw_cfg");
qdev_prop_set_uint32(dev, "ctl_iobase", ctl_port);
qdev_prop_set_uint32(dev, "data_iobase", data_port);
qdev_init_nofail(dev);
d = sysbus_from_qdev(dev);
s = DO_UPCAST(FWCfgState, busdev.qdev, dev);
if (ctl_port) {
register_ioport_write(ctl_port, 2, 2, fw_cfg_io_writew, s);
}
if (data_port) {
register_ioport_read(data_port, 1, 1, fw_cfg_io_readb, s);
register_ioport_write(data_port, 1, 1, fw_cfg_io_writeb, s);
}
if (ctl_addr) {
io_ctl_memory = cpu_register_io_memory(fw_cfg_ctl_mem_read,
fw_cfg_ctl_mem_write, s);
cpu_register_physical_memory(ctl_addr, FW_CFG_SIZE, io_ctl_memory);
sysbus_mmio_map(d, 0, ctl_addr);
}
if (data_addr) {
io_data_memory = cpu_register_io_memory(fw_cfg_data_mem_read,
fw_cfg_data_mem_write, s);
cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory);
sysbus_mmio_map(d, 1, data_addr);
}
fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
@ -352,8 +351,49 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
vmstate_register(-1, &vmstate_fw_cfg, s);
qemu_register_reset(fw_cfg_reset, s);
return s;
}
static int fw_cfg_init1(SysBusDevice *dev)
{
FWCfgState *s = FROM_SYSBUS(FWCfgState, dev);
int io_ctl_memory, io_data_memory;
io_ctl_memory = cpu_register_io_memory(fw_cfg_ctl_mem_read,
fw_cfg_ctl_mem_write, s);
sysbus_init_mmio(dev, FW_CFG_SIZE, io_ctl_memory);
io_data_memory = cpu_register_io_memory(fw_cfg_data_mem_read,
fw_cfg_data_mem_write, s);
sysbus_init_mmio(dev, FW_CFG_SIZE, io_data_memory);
if (s->ctl_iobase) {
register_ioport_write(s->ctl_iobase, 2, 2, fw_cfg_io_writew, s);
}
if (s->data_iobase) {
register_ioport_read(s->data_iobase, 1, 1, fw_cfg_io_readb, s);
register_ioport_write(s->data_iobase, 1, 1, fw_cfg_io_writeb, s);
}
return 0;
}
static SysBusDeviceInfo fw_cfg_info = {
.init = fw_cfg_init1,
.qdev.name = "fw_cfg",
.qdev.size = sizeof(FWCfgState),
.qdev.vmsd = &vmstate_fw_cfg,
.qdev.reset = fw_cfg_reset,
.qdev.no_user = 1,
.qdev.props = (Property[]) {
DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1),
DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1),
DEFINE_PROP_END_OF_LIST(),
},
};
static void fw_cfg_register_devices(void)
{
sysbus_register_withprop(&fw_cfg_info);
}
device_init(fw_cfg_register_devices)