target-arm: Reinsert missing return statement in ARM mode SRS decode
Since patch
81465888c5
target-arm: factor out handling of SRS instruction
the ARM mode SRS instruction has not worked in QEMU.
The problem is a missing return directive that was removed in the
refactoring, so after decoding the instruction, qemu would fall through
to generate an UNDEF exception for an illegal instruction.
Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
09dada4003
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@ -6762,6 +6762,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
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}
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}
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ARCH(6);
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ARCH(6);
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gen_srs(s, (insn & 0x1f), (insn >> 23) & 3, insn & (1 << 21));
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gen_srs(s, (insn & 0x1f), (insn >> 23) & 3, insn & (1 << 21));
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return;
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} else if ((insn & 0x0e50ffe0) == 0x08100a00) {
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} else if ((insn & 0x0e50ffe0) == 0x08100a00) {
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/* rfe */
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/* rfe */
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int32_t offset;
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int32_t offset;
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