target/sparc: Convert to 3-phase reset
Convert the sparc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-id: 20221124115023.2437291-18-peter.maydell@linaro.org
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@ -35,7 +35,7 @@ typedef struct sparc_def_t sparc_def_t;
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/**
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/**
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* SPARCCPUClass:
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* SPARCCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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* @parent_phases: The parent class' reset phase handlers.
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*
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*
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* A SPARC CPU model.
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* A SPARC CPU model.
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*/
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*/
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@ -45,7 +45,7 @@ struct SPARCCPUClass {
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/*< public >*/
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/*< public >*/
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DeviceRealize parent_realize;
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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ResettablePhases parent_phases;
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sparc_def_t *cpu_def;
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sparc_def_t *cpu_def;
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};
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};
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@ -28,14 +28,16 @@
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//#define DEBUG_FEATURES
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//#define DEBUG_FEATURES
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static void sparc_cpu_reset(DeviceState *dev)
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static void sparc_cpu_reset_hold(Object *obj)
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{
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{
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CPUState *s = CPU(dev);
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CPUState *s = CPU(obj);
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SPARCCPU *cpu = SPARC_CPU(s);
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SPARCCPU *cpu = SPARC_CPU(s);
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SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(cpu);
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SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(cpu);
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CPUSPARCState *env = &cpu->env;
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CPUSPARCState *env = &cpu->env;
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scc->parent_reset(dev);
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if (scc->parent_phases.hold) {
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scc->parent_phases.hold(obj);
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}
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memset(env, 0, offsetof(CPUSPARCState, end_reset_fields));
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memset(env, 0, offsetof(CPUSPARCState, end_reset_fields));
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env->cwp = 0;
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env->cwp = 0;
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@ -889,12 +891,14 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
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SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
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SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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ResettableClass *rc = RESETTABLE_CLASS(oc);
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device_class_set_parent_realize(dc, sparc_cpu_realizefn,
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device_class_set_parent_realize(dc, sparc_cpu_realizefn,
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&scc->parent_realize);
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&scc->parent_realize);
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device_class_set_props(dc, sparc_cpu_properties);
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device_class_set_props(dc, sparc_cpu_properties);
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device_class_set_parent_reset(dc, sparc_cpu_reset, &scc->parent_reset);
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resettable_class_set_parent_phases(rc, NULL, sparc_cpu_reset_hold, NULL,
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&scc->parent_phases);
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cc->class_by_name = sparc_cpu_class_by_name;
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cc->class_by_name = sparc_cpu_class_by_name;
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cc->parse_features = sparc_cpu_parse_features;
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cc->parse_features = sparc_cpu_parse_features;
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