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qtest/cxl: Add more complex test cases with CFMWs

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Add CXL Fixed Memory Windows to the CXL tests.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-40-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Ben Widawsky 2022-04-29 15:41:04 +01:00 committed by Michael S. Tsirkin
parent aa48799530
commit 3b503d56a1
1 changed files with 5 additions and 3 deletions
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8
tests/qtest/cxl-test.c
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@ -9,11 +9,13 @@
#include "libqtest-single.h" #include "libqtest-single.h"
#define QEMU_PXB_CMD "-machine q35,cxl=on " \ #define QEMU_PXB_CMD "-machine q35,cxl=on " \
"-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \
"-cxl-fixed-memory-window targets.0=cxl.0,size=4G "
#define QEMU_2PXB_CMD "-machine q35,cxl=on " \ #define QEMU_2PXB_CMD "-machine q35,cxl=on " \
"-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \
"-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \
"-cxl-fixed-memory-window targets.0=cxl.0,targets.1=cxl.1,size=4G "
#define QEMU_RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " #define QEMU_RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 "