trace-events: Fix up source file comments
They're all wrong since (at least) Paolo's big source tree reorganization. Need to shuffle some event declarations around to keep them under the correct source file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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trace-events
162
trace-events
@ -25,18 +25,14 @@
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#
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# The <format-string> should be a sprintf()-compatible format string.
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# qemu-malloc.c
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g_malloc(size_t size, void *ptr) "size %zu ptr %p"
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g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
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g_free(void *ptr) "ptr %p"
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# osdep.c
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# util/oslib-win32.c
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# util/oslib-posix.c
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qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
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qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p"
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qemu_vfree(void *ptr) "ptr %p"
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qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu"
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# hw/virtio.c
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# hw/virtio/virtio.c
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virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
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virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
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virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
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@ -45,13 +41,13 @@ virtio_irq(void *vq) "vq %p"
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virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
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virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
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# hw/virtio-serial-bus.c
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# hw/char/virtio-serial-bus.c
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virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
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virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
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virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
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virtio_serial_handle_control_message_port(unsigned int port) "port %u"
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# hw/virtio-console.c
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# hw/char/virtio-console.c
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virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
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virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
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virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
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@ -75,6 +71,8 @@ bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t c
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# block/stream.c
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stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
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stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
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# block/commit.c
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commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
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commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
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@ -107,19 +105,19 @@ qmp_block_job_complete(void *job) "job %p"
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block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
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qmp_block_stream(void *bs, void *job) "bs %p job %p"
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# hw/virtio-blk.c
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# hw/block/virtio-blk.c
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virtio_blk_req_complete(void *req, int status) "req %p status %d"
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virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
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virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
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virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
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# hw/dataplane/virtio-blk.c
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# hw/block/dataplane/virtio-blk.c
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virtio_blk_data_plane_start(void *s) "dataplane %p"
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virtio_blk_data_plane_stop(void *s) "dataplane %p"
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virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
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virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d"
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# hw/dataplane/vring.c
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# hw/virtio/dataplane/vring.c
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vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p"
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# thread-pool.c
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@ -127,7 +125,8 @@ thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %
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thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
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thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
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# posix-aio-compat.c
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# block/raw-win32.c
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# block/raw-posix.c
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paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
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# ioport.c
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@ -138,29 +137,31 @@ cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
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# Since requests are raised via monitor, not many tracepoints are needed.
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balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
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# hw/apic.c
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apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
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apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
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# hw/intc/apic_common.c
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cpu_set_apic_base(uint64_t val) "%016"PRIx64
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cpu_get_apic_base(uint64_t val) "%016"PRIx64
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apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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# coalescing
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apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
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apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
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apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
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# hw/cs4231.c
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# hw/intc/apic.c
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apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
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apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
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apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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# hw/audio/cs4231.c
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cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
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cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
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cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
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cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
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# hw/ds1225y.c
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# hw/nvram/ds1225y.c
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nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
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nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
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# hw/eccmemctl.c
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# hw/misc/eccmemctl.c
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ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
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ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
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@ -180,26 +181,26 @@ ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
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ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
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ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
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# hw/fw_cfg.c
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# hw/nvram/fw_cfg.c
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fw_cfg_write(void *s, uint8_t value) "%p %d"
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fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
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fw_cfg_read(void *s, uint8_t ret) "%p = %d"
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fw_cfg_add_file_dupe(void *s, char *name) "%p %s"
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fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
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# hw/hd-geometry.c
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# hw/block/hd-geometry.c
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hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d"
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hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d"
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# hw/jazz-led.c
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# hw/display/jazz_led.c
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jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
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jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
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# hw/lance.c
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# hw/net/lance.c
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lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
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lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
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# hw/slavio_intctl.c
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# hw/intc/slavio_intctl.c
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slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
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slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
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slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
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@ -213,7 +214,7 @@ slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x
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slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
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slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
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# hw/slavio_misc.c
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# hw/misc/slavio_misc.c
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slavio_misc_update_irq_raise(void) "Raise IRQ"
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slavio_misc_update_irq_lower(void) "Lower IRQ"
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slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
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@ -234,7 +235,7 @@ slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
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slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
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slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
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# hw/slavio_timer.c
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# hw/timer/slavio_timer.c
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slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
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slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
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slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
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@ -249,7 +250,7 @@ slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d cha
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slavio_timer_mem_writel_mode_invalid(void) "not system timer"
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slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
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# hw/sparc32_dma.c
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# hw/dma/sparc32_dma.c
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ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
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ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
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sparc32_dma_set_irq_raise(void) "Raise IRQ"
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@ -261,13 +262,13 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg
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sparc32_dma_enable_raise(void) "Raise DMA enable"
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sparc32_dma_enable_lower(void) "Lower DMA enable"
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# hw/sun4m.c
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# hw/sparc/sun4m.c
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sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
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sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
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sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
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sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
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# hw/sun4m_iommu.c
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# hw/dma/sun4m_iommu.c
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sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
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sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
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sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
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@ -425,6 +426,7 @@ usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%
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usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
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# hw/usb/host-linux.c
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# hw/usb/host-libusb.c
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usb_host_open_started(int bus, int addr) "dev %d:%d"
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usb_host_open_success(int bus, int addr) "dev %d:%d"
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usb_host_open_failure(int bus, int addr) "dev %d:%d"
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@ -464,7 +466,7 @@ usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *
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usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d"
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usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
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# hw/scsi-bus.c
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# hw/scsi/scsi-bus.c
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scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
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@ -486,6 +488,9 @@ scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
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vm_state_notify(int running, int reason) "running %d reason %d"
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load_file(const char *name, const char *path) "name %s location %s"
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runstate_set(int new_state) "new state %d"
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g_malloc(size_t size, void *ptr) "size %zu ptr %p"
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g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
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g_free(void *ptr) "ptr %p"
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# block/qcow2.c
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qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d"
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@ -494,6 +499,7 @@ qcow2_writev_start_part(void *co) "co %p"
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qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d"
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qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
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# block/qcow2-cluster.c
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qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d"
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qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
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qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
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@ -507,6 +513,7 @@ qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
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qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
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qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
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# block/qcow2-cache.c
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qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
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qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
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qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
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@ -538,11 +545,11 @@ qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t o
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qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
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qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
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# hw/g364fb.c
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# hw/display/g364fb.c
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g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
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g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
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# hw/grlib_gptimer.c
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# hw/timer/grlib_gptimer.c
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grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
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grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
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grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
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@ -551,19 +558,19 @@ grlib_gptimer_hit(int id) "timer:%d HIT"
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grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
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grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
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# hw/grlib_irqmp.c
|
||||
# hw/intc/grlib_irqmp.c
|
||||
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
|
||||
grlib_irqmp_ack(int intno) "interrupt:%d"
|
||||
grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
|
||||
grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
|
||||
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
||||
|
||||
# hw/grlib_apbuart.c
|
||||
# hw/char/grlib_apbuart.c
|
||||
grlib_apbuart_event(int event) "event:%d"
|
||||
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
||||
grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
|
||||
|
||||
# hw/leon3.c
|
||||
# hw/sparc/leon3.c
|
||||
leon3_set_irq(int intno) "Set CPU IRQ %d"
|
||||
leon3_reset_irq(int intno) "Reset CPU IRQ %d"
|
||||
|
||||
@ -574,7 +581,7 @@ spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
|
||||
spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
|
||||
spice_vmc_event(int event) "spice vmc event %d"
|
||||
|
||||
# hw/lm32_pic.c
|
||||
# hw/intc/lm32_pic.c
|
||||
lm32_pic_raise_irq(void) "Raise CPU interrupt"
|
||||
lm32_pic_lower_irq(void) "Lower CPU interrupt"
|
||||
lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
|
||||
@ -583,27 +590,27 @@ lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
|
||||
lm32_pic_get_im(uint32_t im) "im 0x%08x"
|
||||
lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
|
||||
|
||||
# hw/lm32_juart.c
|
||||
# hw/char/lm32_juart.c
|
||||
lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
|
||||
lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
|
||||
lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
|
||||
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
|
||||
|
||||
# hw/lm32_timer.c
|
||||
# hw/timer/lm32_timer.c
|
||||
lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
||||
lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
||||
lm32_timer_hit(void) "timer hit"
|
||||
lm32_timer_irq_state(int level) "irq state %d"
|
||||
|
||||
# hw/lm32_uart.c
|
||||
# hw/char/lm32_uart.c
|
||||
lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
||||
lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
||||
lm32_uart_irq_state(int level) "irq state %d"
|
||||
|
||||
# hw/lm32_sys.c
|
||||
# hw/misc/lm32_sys.c
|
||||
lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
||||
|
||||
# hw/megasas.c
|
||||
# hw/scsi/megasas.c
|
||||
megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
|
||||
megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
|
||||
megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
|
||||
@ -677,7 +684,7 @@ megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
|
||||
megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
|
||||
megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
|
||||
|
||||
# hw/milkymist-ac97.c
|
||||
# hw/audio/milkymist-ac97.c
|
||||
milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
|
||||
@ -689,15 +696,15 @@ milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
|
||||
milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
|
||||
milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
|
||||
|
||||
# hw/milkymist-hpdmc.c
|
||||
# hw/misc/milkymist-hpdmc.c
|
||||
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
||||
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
||||
|
||||
# hw/milkymist-memcard.c
|
||||
# hw/sd/milkymist-memcard.c
|
||||
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
|
||||
# hw/milkymist-minimac2.c
|
||||
# hw/net/milkymist-minimac2.c
|
||||
milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
|
||||
@ -710,20 +717,20 @@ milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
|
||||
milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
|
||||
milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
|
||||
|
||||
# hw/milkymist-pfpu.c
|
||||
# hw/misc/milkymist-pfpu.c
|
||||
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
|
||||
milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
|
||||
|
||||
# hw/milkymist-softusb.c
|
||||
# hw/input/milkymist-softusb.c
|
||||
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_softusb_mevt(uint8_t m) "m %d"
|
||||
milkymist_softusb_kevt(uint8_t m) "m %d"
|
||||
milkymist_softusb_pulse_irq(void) "Pulse IRQ"
|
||||
|
||||
# hw/milkymist-sysctl.c
|
||||
# hw/timer/milkymist-sysctl.c
|
||||
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_sysctl_icap_write(uint32_t value) "value %08x"
|
||||
@ -734,30 +741,30 @@ milkymist_sysctl_stop_timer1(void) "Stop timer1"
|
||||
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
|
||||
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
|
||||
|
||||
# hw/milkymist-tmu2.c
|
||||
# hw/display/milkymist-tmu2.c
|
||||
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_tmu2_start(void) "Start TMU"
|
||||
milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
|
||||
|
||||
# hw/milkymist-uart.c
|
||||
# hw/char/milkymist-uart.c
|
||||
milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_uart_raise_irq(void) "Raise IRQ"
|
||||
milkymist_uart_lower_irq(void) "Lower IRQ"
|
||||
|
||||
# hw/milkymist-vgafb.c
|
||||
# hw/display/milkymist-vgafb.c
|
||||
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
||||
|
||||
# hw/mipsnet.c
|
||||
# hw/net/mipsnet.c
|
||||
mipsnet_send(uint32_t size) "sending len=%u"
|
||||
mipsnet_receive(uint32_t size) "receiving len=%u"
|
||||
mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
|
||||
mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
|
||||
mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
|
||||
|
||||
# hw/pc87312.c
|
||||
# hw/isa/pc87312.c
|
||||
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
|
||||
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
|
||||
pc87312_info_floppy(uint32_t base) "base 0x%x"
|
||||
@ -809,7 +816,7 @@ xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
|
||||
xen_remap_bucket(uint64_t index) "index %#"PRIx64
|
||||
xen_map_cache_return(void* ptr) "%p"
|
||||
|
||||
# hw/xen_platform.c
|
||||
# hw/xen/xen_platform.c
|
||||
xen_platform_log(char *s) "xen platform: %s"
|
||||
|
||||
# qemu-coroutine.c
|
||||
@ -825,7 +832,7 @@ qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
|
||||
qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
|
||||
qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
|
||||
|
||||
# hw/escc.c
|
||||
# hw/char/escc.c
|
||||
escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
|
||||
escc_get_queue(char channel, int val) "channel %c get 0x%02x"
|
||||
escc_update_irq(int irq) "IRQ = %d"
|
||||
@ -846,7 +853,7 @@ iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque,
|
||||
iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
|
||||
iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
|
||||
|
||||
# hw/esp.c
|
||||
# hw/scsi/esp.c
|
||||
esp_error_fifo_overrun(void) "FIFO overrun"
|
||||
esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
|
||||
esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
|
||||
@ -881,6 +888,8 @@ esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
|
||||
esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
|
||||
esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
|
||||
esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
|
||||
|
||||
# hw/scsi/esp-pci.c
|
||||
esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
|
||||
esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
|
||||
esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
|
||||
@ -903,7 +912,7 @@ monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
|
||||
monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64
|
||||
monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
|
||||
|
||||
# hw/opencores_eth.c
|
||||
# hw/net/opencores_eth.c
|
||||
open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
|
||||
open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
|
||||
open_eth_update_irq(uint32_t v) "IRQ <- %x"
|
||||
@ -973,10 +982,12 @@ mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, u
|
||||
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
|
||||
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
|
||||
|
||||
# target-sparc/int_helper.c
|
||||
# target-sparc/int64_helper.c
|
||||
int_helper_set_softint(uint32_t softint) "new %08x"
|
||||
int_helper_clear_softint(uint32_t softint) "new %08x"
|
||||
int_helper_write_softint(uint32_t softint) "new %08x"
|
||||
|
||||
# target-sparc/int32_helper.c
|
||||
int_helper_icache_freeze(void) "Instruction cache: freeze"
|
||||
int_helper_dcache_freeze(void) "Data cache: freeze"
|
||||
|
||||
@ -995,7 +1006,7 @@ dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
|
||||
dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d"
|
||||
dma_map_wait(void *dbs) "dbs=%p"
|
||||
|
||||
# console.h
|
||||
# ui/console.c
|
||||
console_gfx_new(void) ""
|
||||
console_txt_new(int w, int h) "%dx%d"
|
||||
console_select(int nr) "%d"
|
||||
@ -1005,9 +1016,9 @@ displaysurface_create_from(void *display_surface, int w, int h, int bpp, int swa
|
||||
displaysurface_free(void *display_surface) "surface=%p"
|
||||
displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
|
||||
displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
|
||||
|
||||
# vga.c
|
||||
ppm_save(const char *filename, void *display_surface) "%s surface=%p"
|
||||
|
||||
# hw/display/vmware_vga.c
|
||||
vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
||||
vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
||||
vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
||||
@ -1017,7 +1028,6 @@ vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
||||
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
|
||||
|
||||
# savevm.c
|
||||
|
||||
savevm_section_start(void) ""
|
||||
savevm_section_end(unsigned int section_id) "section_id %u"
|
||||
|
||||
@ -1026,7 +1036,7 @@ migration_bitmap_sync_start(void) ""
|
||||
migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64""
|
||||
migration_throttle(void) ""
|
||||
|
||||
# hw/qxl.c
|
||||
# hw/display/qxl.c
|
||||
disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
|
||||
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
|
||||
qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
|
||||
@ -1064,12 +1074,6 @@ qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t
|
||||
qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
|
||||
qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
|
||||
qxl_soft_reset(int qid) "%d"
|
||||
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
|
||||
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
|
||||
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
|
||||
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
|
||||
qemu_spice_wakeup(uint32_t qid) "%d"
|
||||
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
|
||||
qxl_spice_destroy_surfaces_complete(int qid) "%d"
|
||||
qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
|
||||
qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
|
||||
@ -1094,13 +1098,21 @@ qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
|
||||
qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
|
||||
qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
|
||||
|
||||
# hw/qxl-render.c
|
||||
# ui/spice-display.c
|
||||
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
|
||||
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
|
||||
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
|
||||
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
|
||||
qemu_spice_wakeup(uint32_t qid) "%d"
|
||||
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
|
||||
|
||||
# hw/display/qxl-render.c
|
||||
qxl_render_blit_guest_primary_initialized(void) ""
|
||||
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
|
||||
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
|
||||
qxl_render_update_area_done(void *cookie) "%p"
|
||||
|
||||
# hw/spapr_pci.c
|
||||
# hw/ppc/spapr_pci.c
|
||||
spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)"
|
||||
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
|
||||
spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u"
|
||||
@ -1108,7 +1120,7 @@ spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "q
|
||||
spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
|
||||
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
|
||||
|
||||
# hw/xics.c
|
||||
# hw/ppc/xics.c
|
||||
xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
|
||||
xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
|
||||
xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
|
||||
@ -1121,7 +1133,7 @@ xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_
|
||||
xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
|
||||
xics_ics_eoi(int nr) "ics_eoi: irq %#x"
|
||||
|
||||
# hbitmap.c
|
||||
# util/hbitmap.c
|
||||
hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx"
|
||||
hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
|
||||
hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
|
||||
|
Loading…
Reference in New Issue
Block a user