fpu/softfloat: Pass FloatClass to pickNaNMulAdd
For each operand, pass a single enumeration instead of a pair of booleans. The commit also merges multiple different ifdef-selected implementations of pickNaNMulAdd into a single function whose body is ifdef-selected. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -594,15 +594,14 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
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| information.
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| Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_ARM)
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static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag cIsQNaN, flag cIsSNaN, flag infzero,
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float_status *status)
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static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
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bool infzero, float_status *status)
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{
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#if defined(TARGET_ARM)
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/* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
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* the default NaN
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*/
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if (infzero && cIsQNaN) {
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if (infzero && is_qnan(c_cls)) {
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float_raise(float_flag_invalid, status);
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return 3;
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}
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@ -610,25 +609,20 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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/* This looks different from the ARM ARM pseudocode, because the ARM ARM
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* puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
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*/
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if (cIsSNaN) {
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if (is_snan(c_cls)) {
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return 2;
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} else if (aIsSNaN) {
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} else if (is_snan(a_cls)) {
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return 0;
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} else if (bIsSNaN) {
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} else if (is_snan(b_cls)) {
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return 1;
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} else if (cIsQNaN) {
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} else if (is_qnan(c_cls)) {
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return 2;
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} else if (aIsQNaN) {
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} else if (is_qnan(a_cls)) {
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return 0;
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} else {
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return 1;
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}
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}
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#elif defined(TARGET_MIPS)
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static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag cIsQNaN, flag cIsSNaN, flag infzero,
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float_status *status)
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{
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/* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
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* the default NaN
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*/
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@ -639,41 +633,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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if (snan_bit_is_one(status)) {
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/* Prefer sNaN over qNaN, in the a, b, c order. */
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if (aIsSNaN) {
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if (is_snan(a_cls)) {
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return 0;
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} else if (bIsSNaN) {
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} else if (is_snan(b_cls)) {
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return 1;
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} else if (cIsSNaN) {
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} else if (is_snan(c_cls)) {
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return 2;
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} else if (aIsQNaN) {
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} else if (is_qnan(a_cls)) {
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return 0;
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} else if (bIsQNaN) {
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} else if (is_qnan(b_cls)) {
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return 1;
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} else {
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return 2;
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}
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} else {
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/* Prefer sNaN over qNaN, in the c, a, b order. */
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if (cIsSNaN) {
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if (is_snan(c_cls)) {
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return 2;
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} else if (aIsSNaN) {
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} else if (is_snan(a_cls)) {
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return 0;
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} else if (bIsSNaN) {
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} else if (is_snan(b_cls)) {
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return 1;
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} else if (cIsQNaN) {
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} else if (is_qnan(c_cls)) {
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return 2;
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} else if (aIsQNaN) {
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} else if (is_qnan(a_cls)) {
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return 0;
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} else {
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return 1;
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}
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}
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}
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#elif defined(TARGET_PPC)
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static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag cIsQNaN, flag cIsSNaN, flag infzero,
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float_status *status)
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{
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/* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
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* to return an input NaN if we have one (ie c) rather than generating
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* a default NaN
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@ -686,31 +675,26 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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/* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
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* otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
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*/
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if (aIsSNaN || aIsQNaN) {
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if (is_nan(a_cls)) {
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return 0;
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} else if (cIsSNaN || cIsQNaN) {
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} else if (is_nan(c_cls)) {
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return 2;
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} else {
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return 1;
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}
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}
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#else
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/* A default implementation: prefer a to b to c.
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* This is unlikely to actually match any real implementation.
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*/
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static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag cIsQNaN, flag cIsSNaN, flag infzero,
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float_status *status)
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{
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if (aIsSNaN || aIsQNaN) {
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/* A default implementation: prefer a to b to c.
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* This is unlikely to actually match any real implementation.
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*/
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if (is_nan(a_cls)) {
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return 0;
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} else if (bIsSNaN || bIsQNaN) {
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} else if (is_nan(b_cls)) {
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return 1;
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} else {
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return 2;
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}
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}
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#endif
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}
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/*----------------------------------------------------------------------------
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| Takes two single-precision floating-point values `a' and `b', one of which
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@ -601,10 +601,7 @@ static FloatParts pick_nan_muladd(FloatParts a, FloatParts b, FloatParts c,
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s->float_exception_flags |= float_flag_invalid;
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}
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which = pickNaNMulAdd(is_qnan(a.cls), is_snan(a.cls),
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is_qnan(b.cls), is_snan(b.cls),
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is_qnan(c.cls), is_snan(c.cls),
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inf_zero, s);
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which = pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s);
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if (s->default_nan_mode) {
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/* Note that this check is after pickNaNMulAdd so that function
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