From 3d52472f81f0e0684fcab238ab816faeee6b8bcd Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 9 May 2022 17:04:43 +0100 Subject: [PATCH] target/arm: Drop unsupported_encoding() macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The unsupported_encoding() macro logs a LOG_UNIMP message and then generates code to raise the usual exception for an unallocated encoding. Back when we were still implementing the A64 decoder this was helpful for flagging up when guest code was using something we hadn't yet implemented. Now we completely cover the A64 instruction set it is barely used. The only remaining uses are for five instructions whose semantics are "UNDEF, unless being run under external halting debug": * HLT (when not being used for semihosting) * DCPSR1, DCPS2, DCPS3 * DRPS QEMU doesn't implement external halting debug, so for us the UNDEF is the architecturally correct behaviour (because it's not possible to execute these instructions with halting debug enabled). The LOG_UNIMP doesn't serve a useful purpose; replace these uses of unsupported_encoding() with unallocated_encoding(), and delete the macro. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20220509160443.3561604-1-peter.maydell@linaro.org --- target/arm/translate-a64.c | 8 ++++---- target/arm/translate-a64.h | 9 --------- 2 files changed, 4 insertions(+), 13 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 176a3c83ba..f502545307 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -2127,13 +2127,13 @@ static void disas_exc(DisasContext *s, uint32_t insn) * with our 32-bit semihosting). */ if (s->current_el == 0) { - unsupported_encoding(s, insn); + unallocated_encoding(s); break; } #endif gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); } else { - unsupported_encoding(s, insn); + unallocated_encoding(s); } break; case 5: @@ -2142,7 +2142,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) break; } /* DCPS1, DCPS2, DCPS3 */ - unsupported_encoding(s, insn); + unallocated_encoding(s); break; default: unallocated_encoding(s); @@ -2307,7 +2307,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) if (op3 != 0 || op4 != 0 || rn != 0x1f) { goto do_unallocated; } else { - unsupported_encoding(s, insn); + unallocated_encoding(s); } return; diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 38884158aa..f2e8ee0ee1 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -18,15 +18,6 @@ #ifndef TARGET_ARM_TRANSLATE_A64_H #define TARGET_ARM_TRANSLATE_A64_H -#define unsupported_encoding(s, insn) \ - do { \ - qemu_log_mask(LOG_UNIMP, \ - "%s:%d: unsupported instruction encoding 0x%08x " \ - "at pc=%016" PRIx64 "\n", \ - __FILE__, __LINE__, insn, s->pc_curr); \ - unallocated_encoding(s); \ - } while (0) - TCGv_i64 new_tmp_a64(DisasContext *s); TCGv_i64 new_tmp_a64_local(DisasContext *s); TCGv_i64 new_tmp_a64_zero(DisasContext *s);