tcg-ppc64: Rearrange integer constant constraints
We'll need a zero, and Z makes more sense for that. Make sure we have a full compliment of signed and unsigned 16 and 32-bit tests. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -22,7 +22,11 @@
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* THE SOFTWARE.
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*/
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#define TCG_CT_CONST_U32 0x100
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#define TCG_CT_CONST_S16 0x100
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#define TCG_CT_CONST_U16 0x200
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#define TCG_CT_CONST_S32 0x400
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#define TCG_CT_CONST_U32 0x800
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#define TCG_CT_CONST_ZERO 0x1000
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static uint8_t *tb_ret_addr;
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@ -242,9 +246,21 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
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tcg_regset_reset_reg (ct->u.regs, TCG_REG_R6);
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#endif
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break;
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case 'Z':
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case 'I':
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ct->ct |= TCG_CT_CONST_S16;
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break;
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case 'J':
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ct->ct |= TCG_CT_CONST_U16;
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break;
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case 'T':
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ct->ct |= TCG_CT_CONST_S32;
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break;
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case 'U':
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ct->ct |= TCG_CT_CONST_U32;
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break;
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case 'Z':
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ct->ct |= TCG_CT_CONST_ZERO;
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break;
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default:
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return -1;
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}
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@ -257,13 +273,20 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
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static int tcg_target_const_match (tcg_target_long val,
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const TCGArgConstraint *arg_ct)
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{
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int ct;
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ct = arg_ct->ct;
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if (ct & TCG_CT_CONST)
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int ct = arg_ct->ct;
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if (ct & TCG_CT_CONST) {
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return 1;
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else if ((ct & TCG_CT_CONST_U32) && (val == (uint32_t) val))
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} else if ((ct & TCG_CT_CONST_S16) && val == (int16_t)val) {
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return 1;
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} else if ((ct & TCG_CT_CONST_U16) && val == (uint16_t)val) {
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return 1;
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} else if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val) {
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return 1;
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} else if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val) {
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return 1;
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} else if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
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return 1;
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}
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return 0;
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}
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@ -1613,9 +1636,9 @@ static const TCGTargetOpDef ppc_op_defs[] = {
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{ INDEX_op_add_i64, { "r", "r", "ri" } },
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{ INDEX_op_sub_i64, { "r", "r", "ri" } },
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{ INDEX_op_and_i64, { "r", "r", "rZ" } },
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{ INDEX_op_or_i64, { "r", "r", "rZ" } },
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{ INDEX_op_xor_i64, { "r", "r", "rZ" } },
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{ INDEX_op_and_i64, { "r", "r", "rU" } },
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{ INDEX_op_or_i64, { "r", "r", "rU" } },
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{ INDEX_op_xor_i64, { "r", "r", "rU" } },
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{ INDEX_op_shl_i64, { "r", "r", "ri" } },
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{ INDEX_op_shr_i64, { "r", "r", "ri" } },
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