From 3da4004c217148b1662a6fa6a6198b1c5df1adbb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 21 Aug 2023 14:59:52 +0200 Subject: [PATCH] target/loongarch: Log I/O write accesses to CSR registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao Message-Id: <20230821125959.28666-2-philmd@linaro.org> Signed-off-by: Song Gao --- target/loongarch/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..7107968699 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -544,6 +544,8 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) static void loongarch_qemu_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { + qemu_log_mask(LOG_UNIMP, "[%s]: Unimplemented reg 0x%" HWADDR_PRIx "\n", + __func__, addr); } static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)