target/arm: Fix aa64 ldp register writeback
For "ldp x0, x1, [x0]", if the second load is on a second page and the second page is unmapped, the exception would be raised with x0 already modified. This means the instruction couldn't be restarted. Cc: qemu-arm@nongnu.org Cc: qemu-stable@nongnu.org Reported-by: Andrew <andrew@fubar.geek.nz> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20170825224833.4463-1-richard.henderson@linaro.org Fixes: https://bugs.launchpad.net/qemu/+bug/1713066 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMM: tweaked comment format] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -2217,29 +2217,34 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
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} else {
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do_fp_st(s, rt, tcg_addr, size);
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}
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} else {
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TCGv_i64 tcg_rt = cpu_reg(s, rt);
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if (is_load) {
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do_gpr_ld(s, tcg_rt, tcg_addr, size, is_signed, false,
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false, 0, false, false);
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} else {
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do_gpr_st(s, tcg_rt, tcg_addr, size,
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false, 0, false, false);
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}
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}
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tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
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if (is_vector) {
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tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
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if (is_load) {
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do_fp_ld(s, rt2, tcg_addr, size);
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} else {
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do_fp_st(s, rt2, tcg_addr, size);
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}
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} else {
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TCGv_i64 tcg_rt = cpu_reg(s, rt);
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TCGv_i64 tcg_rt2 = cpu_reg(s, rt2);
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if (is_load) {
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TCGv_i64 tmp = tcg_temp_new_i64();
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/* Do not modify tcg_rt before recognizing any exception
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* from the second load.
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*/
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do_gpr_ld(s, tmp, tcg_addr, size, is_signed, false,
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false, 0, false, false);
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tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
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do_gpr_ld(s, tcg_rt2, tcg_addr, size, is_signed, false,
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false, 0, false, false);
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tcg_gen_mov_i64(tcg_rt, tmp);
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tcg_temp_free_i64(tmp);
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} else {
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do_gpr_st(s, tcg_rt, tcg_addr, size,
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false, 0, false, false);
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tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
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do_gpr_st(s, tcg_rt2, tcg_addr, size,
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false, 0, false, false);
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}
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