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hw/d*: pass owner to memory_region_init* functions 

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2013-06-06 21:25:08 -04:00
parent 300b1fc68c
commit 3eadad551d
15 changed files with 34 additions and 27 deletions
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2
hw/display/cirrus_vga.c
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@ -2967,7 +2967,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* setup PCI */
memory_region_init(&s->pci_bar, NULL, "cirrus-pci-bar0", 0x2000000);
memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000);
/* XXX: add byte swapping apertures */
memory_region_add_subregion(&s->pci_bar, 0, &s->cirrus_linear_io);

2
hw/display/exynos4210_fimd.c
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@ -1908,7 +1908,7 @@ static int exynos4210_fimd_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[1]);
sysbus_init_irq(dev, &s->irq[2]);
memory_region_init_io(&s->iomem, NULL, &exynos4210_fimd_mmio_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_fimd_mmio_ops, s,
"exynos4210.fimd", FIMD_REGS_SIZE);
sysbus_init_mmio(dev, &s->iomem);
s->console = graphic_console_init(DEVICE(dev), &exynos4210_fimd_ops, s);

2
hw/display/jazz_led.c
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@ -264,7 +264,7 @@ static int jazz_led_init(SysBusDevice *dev)
{
LedState *s = FROM_SYSBUS(LedState, dev);
memory_region_init_io(&s->iomem, NULL, &led_ops, s, "led", 1);
memory_region_init_io(&s->iomem, OBJECT(s), &led_ops, s, "led", 1);
sysbus_init_mmio(dev, &s->iomem);
s->con = graphic_console_init(DEVICE(dev), &jazz_led_ops, s);

2
hw/display/milkymist-tmu2.c
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@ -447,7 +447,7 @@ static int milkymist_tmu2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->regs_region, NULL, &tmu2_mmio_ops, s,
memory_region_init_io(&s->regs_region, OBJECT(s), &tmu2_mmio_ops, s,
"milkymist-tmu2", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);

2
hw/display/milkymist-vgafb.c
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@ -279,7 +279,7 @@ static int milkymist_vgafb_init(SysBusDevice *dev)
{
MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
memory_region_init_io(&s->regs_region, NULL, &vgafb_mmio_ops, s,
memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
"milkymist-vgafb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);

2
hw/display/pl110.c
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@ -453,7 +453,7 @@ static int pl110_init(SysBusDevice *dev)
{
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
memory_region_init_io(&s->iomem, NULL, &pl110_ops, s, "pl110", 0x1000);
memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);

15
hw/display/qxl.c
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@ -1981,18 +1981,20 @@ static int qxl_init_common(PCIQXLDevice *qxl)
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
qxl->rom_size = qxl_rom_size();
memory_region_init_ram(&qxl->rom_bar, NULL, "qxl.vrom", qxl->rom_size);
memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
qxl->rom_size);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
memory_region_init_ram(&qxl->vram_bar, NULL, "qxl.vram", qxl->vram_size);
memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
qxl->vram_size);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
memory_region_init_alias(&qxl->vram32_bar, NULL, "qxl.vram32", &qxl->vram_bar,
0, qxl->vram32_size);
memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
&qxl->vram_bar, 0, qxl->vram32_size);
memory_region_init_io(&qxl->io_bar, NULL, &qxl_io_ops, qxl,
memory_region_init_io(&qxl->io_bar, OBJECT(qxl), &qxl_io_ops, qxl,
"qxl-ioports", io_size);
if (qxl->id == 0) {
vga_dirty_log_start(&qxl->vga);
@ -2095,7 +2097,8 @@ static int qxl_init_secondary(PCIDevice *dev)
qxl->id = device_id++;
qxl_init_ramsize(qxl);
memory_region_init_ram(&qxl->vga.vram, NULL, "qxl.vgavram", qxl->vga.vram_size);
memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
qxl->vga.vram_size);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
qxl->vga.con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);

18
hw/display/tcx.c
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@ -528,7 +528,7 @@ static int tcx_init1(SysBusDevice *dev)
int size;
uint8_t *vram_base;
memory_region_init_ram(&s->vram_mem, NULL, "tcx.vram",
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
@ -536,21 +536,23 @@ static int tcx_init1(SysBusDevice *dev)
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
memory_region_init_alias(&s->vram_8bit, NULL, "tcx.vram.8bit",
memory_region_init_alias(&s->vram_8bit, OBJECT(s), "tcx.vram.8bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* DAC */
memory_region_init_io(&s->dac, NULL, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
memory_region_init_io(&s->dac, OBJECT(s), &tcx_dac_ops, s,
"tcx.dac", TCX_DAC_NREGS);
sysbus_init_mmio(dev, &s->dac);
/* TEC (dummy) */
memory_region_init_io(&s->tec, NULL, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
memory_region_init_io(&s->tec, OBJECT(s), &dummy_ops, s,
"tcx.tec", TCX_TEC_NREGS);
sysbus_init_mmio(dev, &s->tec);
/* THC: NetBSD writes here even with 8-bit display: dummy */
memory_region_init_io(&s->thc24, NULL, &dummy_ops, s, "tcx.thc24",
memory_region_init_io(&s->thc24, OBJECT(s), &dummy_ops, s, "tcx.thc24",
TCX_THC_NREGS_24);
sysbus_init_mmio(dev, &s->thc24);
@ -559,7 +561,7 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
memory_region_init_alias(&s->vram_24bit, NULL, "tcx.vram.24bit",
memory_region_init_alias(&s->vram_24bit, OBJECT(s), "tcx.vram.24bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_24bit);
vram_offset += size;
@ -569,14 +571,14 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
memory_region_init_alias(&s->vram_cplane, NULL, "tcx.vram.cplane",
memory_region_init_alias(&s->vram_cplane, OBJECT(s), "tcx.vram.cplane",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_cplane);
s->con = graphic_console_init(DEVICE(dev), &tcx24_ops, s);
} else {
/* THC 8 bit (dummy) */
memory_region_init_io(&s->thc8, NULL, &dummy_ops, s, "tcx.thc8",
memory_region_init_io(&s->thc8, OBJECT(s), &dummy_ops, s, "tcx.thc8",
TCX_THC_NREGS_8);
sysbus_init_mmio(dev, &s->thc8);

2
hw/dma/pl080.c
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@ -359,7 +359,7 @@ static int pl08x_init(SysBusDevice *dev, int nchannels)
{
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
memory_region_init_io(&s->iomem, NULL, &pl080_ops, s, "pl080", 0x1000);
memory_region_init_io(&s->iomem, OBJECT(s), &pl080_ops, s, "pl080", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;

3
hw/dma/pl330.c
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@ -1528,7 +1528,8 @@ static void pl330_realize(DeviceState *dev, Error **errp)
PL330State *s = PL330(dev);
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq_abort);
memory_region_init_io(&s->iomem, NULL, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
memory_region_init_io(&s->iomem, OBJECT(s), &pl330_ops, s,
"dma", PL330_IOMEM_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
s->timer = qemu_new_timer_ns(vm_clock, pl330_exec_cycle_timer, s);

2
hw/dma/puv3_dma.c
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@ -80,7 +80,7 @@ static int puv3_dma_init(SysBusDevice *dev)
s->reg_CFG[i] = 0x0;
}
memory_region_init_io(&s->iomem, NULL, &puv3_dma_ops, s, "puv3_dma",
memory_region_init_io(&s->iomem, OBJECT(s), &puv3_dma_ops, s, "puv3_dma",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);

2
hw/dma/pxa2xx_dma.c
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@ -465,7 +465,7 @@ static int pxa2xx_dma_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_dma_request, PXA2XX_DMA_NUM_REQUESTS);
memory_region_init_io(&s->iomem, NULL, &pxa2xx_dma_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_dma_ops, s,
"pxa2xx.dma", 0x00010000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);

3
hw/dma/sparc32_dma.c
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@ -274,7 +274,8 @@ static int sparc32_dma_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
memory_region_init_io(&s->iomem, NULL, &dma_mem_ops, s, "dma", reg_size);
memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s,
"dma", reg_size);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);

2
hw/dma/sun4m_iommu.c
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@ -349,7 +349,7 @@ static int iommu_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, NULL, &iommu_mem_ops, s, "iommu",
memory_region_init_io(&s->iomem, OBJECT(s), &iommu_mem_ops, s, "iommu",
IOMMU_NREGS * sizeof(uint32_t));
sysbus_init_mmio(dev, &s->iomem);

2
hw/dma/xilinx_axidma.c
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@ -590,7 +590,7 @@ static void xilinx_axidma_init(Object *obj)
sysbus_init_irq(sbd, &s->streams[0].irq);
sysbus_init_irq(sbd, &s->streams[1].irq);
memory_region_init_io(&s->iomem, NULL, &axidma_ops, s,
memory_region_init_io(&s->iomem, obj, &axidma_ops, s,
"xlnx.axi-dma", R_MAX * 4 * 2);
sysbus_init_mmio(sbd, &s->iomem);
}