tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multiplies
Rename to fold_multiply2, and handle muls2_i32, mulu2_i64, and muls2_i64. Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1412,19 +1412,44 @@ static bool fold_mul_highpart(OptContext *ctx, TCGOp *op)
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return false;
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}
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static bool fold_mulu2_i32(OptContext *ctx, TCGOp *op)
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static bool fold_multiply2(OptContext *ctx, TCGOp *op)
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{
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if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
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uint32_t a = arg_info(op->args[2])->val;
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uint32_t b = arg_info(op->args[3])->val;
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uint64_t r = (uint64_t)a * b;
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uint64_t a = arg_info(op->args[2])->val;
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uint64_t b = arg_info(op->args[3])->val;
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uint64_t h, l;
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TCGArg rl, rh;
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TCGOp *op2 = tcg_op_insert_before(ctx->tcg, op, INDEX_op_mov_i32);
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TCGOp *op2;
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switch (op->opc) {
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case INDEX_op_mulu2_i32:
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l = (uint64_t)(uint32_t)a * (uint32_t)b;
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h = (int32_t)(l >> 32);
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l = (int32_t)l;
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break;
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case INDEX_op_muls2_i32:
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l = (int64_t)(int32_t)a * (int32_t)b;
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h = l >> 32;
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l = (int32_t)l;
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break;
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case INDEX_op_mulu2_i64:
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mulu64(&l, &h, a, b);
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break;
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case INDEX_op_muls2_i64:
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muls64(&l, &h, a, b);
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break;
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default:
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g_assert_not_reached();
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}
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rl = op->args[0];
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rh = op->args[1];
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tcg_opt_gen_movi(ctx, op, rl, (int32_t)r);
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tcg_opt_gen_movi(ctx, op2, rh, (int32_t)(r >> 32));
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/* The proper opcode is supplied by tcg_opt_gen_mov. */
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op2 = tcg_op_insert_before(ctx->tcg, op, 0);
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tcg_opt_gen_movi(ctx, op, rl, l);
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tcg_opt_gen_movi(ctx, op2, rh, h);
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return true;
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}
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return false;
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@ -1932,8 +1957,9 @@ void tcg_optimize(TCGContext *s)
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CASE_OP_32_64(muluh):
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done = fold_mul_highpart(&ctx, op);
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break;
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case INDEX_op_mulu2_i32:
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done = fold_mulu2_i32(&ctx, op);
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CASE_OP_32_64(muls2):
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CASE_OP_32_64(mulu2):
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done = fold_multiply2(&ctx, op);
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break;
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CASE_OP_32_64(nand):
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done = fold_nand(&ctx, op);
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