hw/arm: Add minimal support for the B-L475E-IOT01A board
This commit adds a new B-L475E-IOT01A board using the STM32L475VG SoC as well as a dedicated documentation file. The implementation is derived from the Netduino Plus 2 machine. There are no peripherals implemented yet, only memory regions. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240108135849.351719-3-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1130,6 +1130,13 @@ S: Maintained
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F: hw/arm/stm32l4x5_soc.c
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F: hw/arm/stm32l4x5_soc.c
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F: include/hw/arm/stm32l4x5_soc.h
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F: include/hw/arm/stm32l4x5_soc.h
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B-L475E-IOT01A IoT Node
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M: Arnaud Minier <arnaud.minier@telecom-paris.fr>
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M: Inès Varhol <ines.varhol@telecom-paris.fr>
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L: qemu-arm@nongnu.org
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S: Maintained
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F: hw/arm/b-l475e-iot01a.c
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SmartFusion2
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SmartFusion2
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M: Subbaraya Sundeep <sundeep.lkml@gmail.com>
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M: Subbaraya Sundeep <sundeep.lkml@gmail.com>
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M: Peter Maydell <peter.maydell@linaro.org>
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M: Peter Maydell <peter.maydell@linaro.org>
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@ -19,6 +19,7 @@ CONFIG_ARM_VIRT=y
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# CONFIG_NSERIES=n
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# CONFIG_NSERIES=n
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# CONFIG_STELLARIS=n
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# CONFIG_STELLARIS=n
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# CONFIG_STM32VLDISCOVERY=n
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# CONFIG_STM32VLDISCOVERY=n
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# CONFIG_B_L475E_IOT01A=n
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# CONFIG_REALVIEW=n
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# CONFIG_REALVIEW=n
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# CONFIG_VERSATILE=n
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# CONFIG_VERSATILE=n
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# CONFIG_VEXPRESS=n
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# CONFIG_VEXPRESS=n
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@ -0,0 +1,46 @@
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B-L475E-IOT01A IoT Node (``b-l475e-iot01a``)
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============================================
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The B-L475E-IOT01A IoT Node uses the STM32L475VG SoC which is based on
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ARM Cortex-M4F core. It is part of STMicroelectronics
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:doc:`STM32 boards </system/arm/stm32>` and more specifically the STM32L4
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ultra-low power series. The STM32L4x5 chip runs at up to 80 MHz and
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integrates 128 KiB of SRAM and up to 1MiB of Flash. The B-L475E-IOT01A board
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namely features 64 Mibit QSPI Flash, BT, WiFi and RF connectivity,
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USART, I2C, SPI, CAN and USB OTG, as well as a variety of sensors.
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Supported devices
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"""""""""""""""""
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Currently, B-L475E-IOT01A machine's implementation is minimal,
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it only supports the following device:
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- Cortex-M4F based STM32L4x5 SoC
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Missing devices
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"""""""""""""""
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The B-L475E-IOT01A does *not* support the following devices:
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- Extended interrupts and events controller (EXTI)
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- Reset and clock control (RCC)
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- Serial ports (UART)
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- System configuration controller (SYSCFG)
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- General-purpose I/Os (GPIO)
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- Analog to Digital Converter (ADC)
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- SPI controller
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- Timer controller (TIMER)
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See the complete list of unimplemented peripheral devices
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in the STM32L4x5 module : ``./hw/arm/stm32l4x5_soc.c``
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Boot options
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""""""""""""
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The B-L475E-IOT01A machine can be started using the ``-kernel``
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option to load a firmware. Example:
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.. code-block:: bash
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$ qemu-system-arm -M b-l475e-iot01a -kernel firmware.bin
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@ -16,11 +16,13 @@ based on this chip :
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- ``netduino2`` Netduino 2 board with STM32F205RFT6 microcontroller
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- ``netduino2`` Netduino 2 board with STM32F205RFT6 microcontroller
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The STM32F4 series is based on ARM Cortex-M4F core. This series is pin-to-pin
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The STM32F4 series is based on ARM Cortex-M4F core, as well as the STM32L4
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compatible with STM32F2 series. The following machines are based on this chip :
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ultra-low-power series. The STM32F4 series is pin-to-pin compatible with STM32F2 series.
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The following machines are based on this ARM Cortex-M4F chip :
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- ``netduinoplus2`` Netduino Plus 2 board with STM32F405RGT6 microcontroller
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- ``netduinoplus2`` Netduino Plus 2 board with STM32F405RGT6 microcontroller
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- ``olimex-stm32-h405`` Olimex STM32 H405 board with STM32F405RGT6 microcontroller
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- ``olimex-stm32-h405`` Olimex STM32 H405 board with STM32F405RGT6 microcontroller
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- ``b-l475e-iot01a`` :doc:`B-L475E-IOT01A IoT Node </system/arm/b-l475e-iot01a>` board with STM32L475VG microcontroller
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There are many other STM32 series that are currently not supported by QEMU.
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There are many other STM32 series that are currently not supported by QEMU.
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@ -84,6 +84,7 @@ undocumented; you can get a complete list by running
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arm/vexpress
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arm/vexpress
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arm/aspeed
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arm/aspeed
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arm/bananapi_m2u.rst
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arm/bananapi_m2u.rst
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arm/b-l475e-iot01a.rst
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arm/sabrelite
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arm/sabrelite
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arm/digic
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arm/digic
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arm/cubieboard
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arm/cubieboard
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@ -449,6 +449,12 @@ config STM32F405_SOC
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select STM32F4XX_SYSCFG
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select STM32F4XX_SYSCFG
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select STM32F4XX_EXTI
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select STM32F4XX_EXTI
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config B_L475E_IOT01A
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bool
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default y
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depends on TCG && ARM
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select STM32L4X5_SOC
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config STM32L4X5_SOC
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config STM32L4X5_SOC
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bool
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bool
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select ARM_V7M
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select ARM_V7M
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@ -0,0 +1,72 @@
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/*
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* B-L475E-IOT01A Discovery Kit machine
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* (B-L475E-IOT01A IoT Node)
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*
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* Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
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* Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* This work is heavily inspired by the netduinoplus2 by Alistair Francis.
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* Original code is licensed under the MIT License:
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*/
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/*
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* The reference used is the STMicroElectronics UM2153 User manual
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* Discovery kit for IoT node, multi-channel communication with STM32L4.
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* https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-clock.h"
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#include "qemu/error-report.h"
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#include "hw/arm/stm32l4x5_soc.h"
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#include "hw/arm/boot.h"
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/* Main SYSCLK frequency in Hz (80MHz) */
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#define MAIN_SYSCLK_FREQ_HZ 80000000ULL
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static void b_l475e_iot01a_init(MachineState *machine)
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{
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const Stm32l4x5SocClass *sc;
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DeviceState *dev;
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Clock *sysclk;
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/* This clock doesn't need migration because it is fixed-frequency */
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sysclk = clock_new(OBJECT(machine), "SYSCLK");
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clock_set_hz(sysclk, MAIN_SYSCLK_FREQ_HZ);
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dev = qdev_new(TYPE_STM32L4X5XG_SOC);
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object_property_add_child(OBJECT(machine), "soc", OBJECT(dev));
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qdev_connect_clock_in(dev, "sysclk", sysclk);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sc = STM32L4X5_SOC_GET_CLASS(dev);
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armv7m_load_kernel(ARM_CPU(first_cpu),
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machine->kernel_filename,
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0, sc->flash_size);
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}
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static void b_l475e_iot01a_machine_init(MachineClass *mc)
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{
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static const char *machine_valid_cpu_types[] = {
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ARM_CPU_TYPE_NAME("cortex-m4"),
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NULL
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};
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mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)";
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mc->init = b_l475e_iot01a_init;
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mc->valid_cpu_types = machine_valid_cpu_types;
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/* SRAM pre-allocated as part of the SoC instantiation */
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mc->default_ram_size = 0;
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}
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DEFINE_MACHINE("b-l475e-iot01a", b_l475e_iot01a_machine_init)
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@ -42,6 +42,7 @@ arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
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arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
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arm_ss.add(when: 'CONFIG_B_L475E_IOT01A', if_true: files('b-l475e-iot01a.c'))
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arm_ss.add(when: 'CONFIG_STM32L4X5_SOC', if_true: files('stm32l4x5_soc.c'))
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arm_ss.add(when: 'CONFIG_STM32L4X5_SOC', if_true: files('stm32l4x5_soc.c'))
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arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
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arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
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arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
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arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
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