diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 44d24b3c59..746c0f0343 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -31,8 +31,6 @@ #include "migration/vmstate.h" #include "hw/irq.h" -#define RISCV_DEBUG_PLIC 0 - static bool addr_between(uint32_t addr, uint32_t base, uint32_t num) { return addr >= base && addr - base < num; @@ -51,47 +49,6 @@ static PLICMode char_to_mode(char c) } } -static char mode_to_char(PLICMode m) -{ - switch (m) { - case PLICMode_U: return 'U'; - case PLICMode_S: return 'S'; - case PLICMode_H: return 'H'; - case PLICMode_M: return 'M'; - default: return '?'; - } -} - -static void sifive_plic_print_state(SiFivePLICState *plic) -{ - int i; - int addrid; - - /* pending */ - qemu_log("pending : "); - for (i = plic->bitfield_words - 1; i >= 0; i--) { - qemu_log("%08x", plic->pending[i]); - } - qemu_log("\n"); - - /* pending */ - qemu_log("claimed : "); - for (i = plic->bitfield_words - 1; i >= 0; i--) { - qemu_log("%08x", plic->claimed[i]); - } - qemu_log("\n"); - - for (addrid = 0; addrid < plic->num_addrs; addrid++) { - qemu_log("hart%d-%c enable: ", - plic->addr_config[addrid].hartid, - mode_to_char(plic->addr_config[addrid].mode)); - for (i = plic->bitfield_words - 1; i >= 0; i--) { - qemu_log("%08x", plic->enable[addrid * plic->bitfield_words + i]); - } - qemu_log("\n"); - } -} - static uint32_t atomic_set_masked(uint32_t *a, uint32_t mask, uint32_t value) { uint32_t old, new, cmp = qatomic_read(a); @@ -115,26 +72,34 @@ static void sifive_plic_set_claimed(SiFivePLICState *plic, int irq, bool level) atomic_set_masked(&plic->claimed[irq >> 5], 1 << (irq & 31), -!!level); } -static int sifive_plic_irqs_pending(SiFivePLICState *plic, uint32_t addrid) +static uint32_t sifive_plic_claimed(SiFivePLICState *plic, uint32_t addrid) { + uint32_t max_irq = 0; + uint32_t max_prio = plic->target_priority[addrid]; int i, j; + for (i = 0; i < plic->bitfield_words; i++) { uint32_t pending_enabled_not_claimed = - (plic->pending[i] & ~plic->claimed[i]) & - plic->enable[addrid * plic->bitfield_words + i]; + (plic->pending[i] & ~plic->claimed[i]) & + plic->enable[addrid * plic->bitfield_words + i]; + if (!pending_enabled_not_claimed) { continue; } + for (j = 0; j < 32; j++) { int irq = (i << 5) + j; uint32_t prio = plic->source_priority[irq]; int enabled = pending_enabled_not_claimed & (1 << j); - if (enabled && prio > plic->target_priority[addrid]) { - return 1; + + if (enabled && prio > max_prio) { + max_irq = irq; + max_prio = prio; } } } - return 0; + + return max_irq; } static void sifive_plic_update(SiFivePLICState *plic) @@ -145,7 +110,7 @@ static void sifive_plic_update(SiFivePLICState *plic) for (addrid = 0; addrid < plic->num_addrs; addrid++) { uint32_t hartid = plic->addr_config[addrid].hartid; PLICMode mode = plic->addr_config[addrid].mode; - int level = sifive_plic_irqs_pending(plic, addrid); + bool level = !!sifive_plic_claimed(plic, addrid); switch (mode) { case PLICMode_M: @@ -158,41 +123,6 @@ static void sifive_plic_update(SiFivePLICState *plic) break; } } - - if (RISCV_DEBUG_PLIC) { - sifive_plic_print_state(plic); - } -} - -static uint32_t sifive_plic_claim(SiFivePLICState *plic, uint32_t addrid) -{ - int i, j; - uint32_t max_irq = 0; - uint32_t max_prio = plic->target_priority[addrid]; - - for (i = 0; i < plic->bitfield_words; i++) { - uint32_t pending_enabled_not_claimed = - (plic->pending[i] & ~plic->claimed[i]) & - plic->enable[addrid * plic->bitfield_words + i]; - if (!pending_enabled_not_claimed) { - continue; - } - for (j = 0; j < 32; j++) { - int irq = (i << 5) + j; - uint32_t prio = plic->source_priority[irq]; - int enabled = pending_enabled_not_claimed & (1 << j); - if (enabled && prio > max_prio) { - max_irq = irq; - max_prio = prio; - } - } - } - - if (max_irq) { - sifive_plic_set_pending(plic, max_irq, false); - sifive_plic_set_claimed(plic, max_irq, true); - } - return max_irq; } static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size) @@ -223,10 +153,15 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size) if (contextid == 0) { return plic->target_priority[addrid]; } else if (contextid == 4) { - uint32_t value = sifive_plic_claim(plic, addrid); + uint32_t max_irq = sifive_plic_claimed(plic, addrid); + + if (max_irq) { + sifive_plic_set_pending(plic, max_irq, false); + sifive_plic_set_claimed(plic, max_irq, true); + } sifive_plic_update(plic); - return value; + return max_irq; } }