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target-i386: Define DR7 bit field constants 

Implicit use of dr7 bit field is a little hard to understand,
so define constants for them and use them consistently.

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
liguang 2013-01-15 13:39:55 +08:00 committed by Andreas Färber
parent 5ec01c2e96
commit 428065ce50
5 changed files with 23 additions and 16 deletions
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6
target-i386/cpu.h
View File

@ -231,6 +231,12 @@
#define DR7_TYPE_SHIFT 16
#define DR7_LEN_SHIFT 18
#define DR7_FIXED_1 0x00000400
#define DR7_LOCAL_BP_MASK 0x55
#define DR7_MAX_BP 4
#define DR7_TYPE_BP_INST 0x0
#define DR7_TYPE_DATA_WR 0x1
#define DR7_TYPE_IO_RW 0x2
#define DR7_TYPE_DATA_RW 0x3
#define PG_PRESENT_BIT 0
#define PG_RW_BIT 1

18
target-i386/helper.c
View File

@ -969,18 +969,18 @@ void hw_breakpoint_insert(CPUX86State *env, int index)
int type, err = 0;
switch (hw_breakpoint_type(env->dr[7], index)) {
case 0:
case DR7_TYPE_BP_INST:
if (hw_breakpoint_enabled(env->dr[7], index))
err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU,
&env->cpu_breakpoint[index]);
break;
case 1:
case DR7_TYPE_DATA_WR:
type = BP_CPU | BP_MEM_WRITE;
goto insert_wp;
case 2:
case DR7_TYPE_IO_RW:
/* No support for I/O watchpoints yet */
break;
case 3:
case DR7_TYPE_DATA_RW:
type = BP_CPU | BP_MEM_ACCESS;
insert_wp:
err = cpu_watchpoint_insert(env, env->dr[index],
@ -997,15 +997,15 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
if (!env->cpu_breakpoint[index])
return;
switch (hw_breakpoint_type(env->dr[7], index)) {
case 0:
case DR7_TYPE_BP_INST:
if (hw_breakpoint_enabled(env->dr[7], index))
cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]);
break;
case 1:
case 3:
case DR7_TYPE_DATA_WR:
case DR7_TYPE_DATA_RW:
cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]);
break;
case 2:
case DR7_TYPE_IO_RW:
/* No support for I/O watchpoints yet */
break;
}
@ -1018,7 +1018,7 @@ int check_hw_breakpoints(CPUX86State *env, int force_dr6_update)
int hit_enabled = 0;
dr6 = env->dr[6] & ~0xf;
for (reg = 0; reg < 4; reg++) {
for (reg = 0; reg < DR7_MAX_BP; reg++) {
type = hw_breakpoint_type(env->dr[7], reg);
if ((type == 0 && env->dr[reg] == env->eip) ||
((type & 1) && env->cpu_watchpoint[reg] &&

5
target-i386/machine.c
View File

@ -265,10 +265,11 @@ static int cpu_post_load(void *opaque, int version_id)
cpu_breakpoint_remove_all(env, BP_CPU);
cpu_watchpoint_remove_all(env, BP_CPU);
for (i = 0; i < 4; i++)
for (i = 0; i < DR7_MAX_BP; i++) {
hw_breakpoint_insert(env, i);
}
tlb_flush(env, 1);
return 0;
}

4
target-i386/misc_helper.c
View File

@ -197,11 +197,11 @@ void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
env->dr[reg] = t0;
hw_breakpoint_insert(env, reg);
} else if (reg == 7) {
for (i = 0; i < 4; i++) {
for (i = 0; i < DR7_MAX_BP; i++) {
hw_breakpoint_remove(env, i);
}
env->dr[7] = t0;
for (i = 0; i < 4; i++) {
for (i = 0; i < DR7_MAX_BP; i++) {
hw_breakpoint_insert(env, i);
}
} else {

6
target-i386/seg_helper.c
View File

@ -465,13 +465,13 @@ static void switch_tss(CPUX86State *env, int tss_selector,
#ifndef CONFIG_USER_ONLY
/* reset local breakpoints */
if (env->dr[7] & 0x55) {
for (i = 0; i < 4; i++) {
if (env->dr[7] & DR7_LOCAL_BP_MASK) {
for (i = 0; i < DR7_MAX_BP; i++) {
if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) {
hw_breakpoint_remove(env, i);
}
}
env->dr[7] &= ~0x55;
env->dr[7] &= ~DR7_LOCAL_BP_MASK;
}
#endif
}