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Switch non-CPU callers from ld/st*_phys to address_space_ld/st* 

Switch all the uses of ld/st*_phys to address_space_ld/st*,
except for those cases where the address space is the CPU's
(ie cs->as). This was done with the following script which
generates a Coccinelle patch.

A few over-80-columns lines in the result were rewrapped by
hand where Coccinelle failed to do the wrapping automatically,
as well as one location where it didn't put a line-continuation
'\' when wrapping lines on a change made to a match inside
a macro definition.

===begin===
#!/bin/sh -e
# Usage:
# ./ldst-phys.spatch.sh > ldst-phys.spatch
# spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/        /g' > out.patch
# patch -p1 < out.patch

for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do
cat <<EOF
@ cpu_matches_ld_${FN} @
expression E1,E2;
identifier as;
@@

ld${FN}_phys(E1->as,E2)

@ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @
expression E1,E2;
@@

-ld${FN}_phys(E1,E2)
+address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL)

EOF

done

for FN in b w_le w_be l_le l_be q_le q_be w l q; do
cat <<EOF
@ cpu_matches_st_${FN} @
expression E1,E2,E3;
identifier as;
@@

st${FN}_phys(E1->as,E2,E3)

@ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @
expression E1,E2,E3;
@@

-st${FN}_phys(E1,E2,E3)
+address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL)

EOF

done
===endit===

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
This commit is contained in:
Peter Maydell 2015-04-26 16:49:24 +01:00
parent 66b9b43c42
commit 42874d3a8c
19 changed files with 193 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
hw/alpha/dp264.c
View File

@ -157,9 +157,12 @@ static void clipper_init(MachineState *machine)
load_image_targphys(initrd_filename, initrd_base, load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base); ram_size - initrd_base);
stq_phys(&address_space_memory, address_space_stq(&address_space_memory, param_offset + 0x100,
param_offset + 0x100, initrd_base + 0xfffffc0000000000ULL); initrd_base + 0xfffffc0000000000ULL,
stq_phys(&address_space_memory, param_offset + 0x108, initrd_size); MEMTXATTRS_UNSPECIFIED,
NULL);
address_space_stq(&address_space_memory, param_offset + 0x108,
initrd_size, MEMTXATTRS_UNSPECIFIED, NULL);
} }
} }
} }

3
hw/alpha/typhoon.c
View File

@ -613,7 +613,8 @@ static bool make_iommu_tlbe(hwaddr taddr, hwaddr mask, IOMMUTLBEntry *ret)
translation, given the address of the PTE. */ translation, given the address of the PTE. */
static bool pte_translate(hwaddr pte_addr, IOMMUTLBEntry *ret) static bool pte_translate(hwaddr pte_addr, IOMMUTLBEntry *ret)
{ {
uint64_t pte = ldq_phys(&address_space_memory, pte_addr); uint64_t pte = address_space_ldq(&address_space_memory, pte_addr,
MEMTXATTRS_UNSPECIFIED, NULL);
/* Check valid bit. */ /* Check valid bit. */
if ((pte & 1) == 0) { if ((pte & 1) == 0) {

6
hw/arm/boot.c
View File

@ -170,7 +170,8 @@ static void default_reset_secondary(ARMCPU *cpu,
{ {
CPUARMState *env = &cpu->env; CPUARMState *env = &cpu->env;
stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0); address_space_stl_notdirty(&address_space_memory, info->smp_bootreg_addr,
0, MEMTXATTRS_UNSPECIFIED, NULL);
env->regs[15] = info->smp_loader_start; env->regs[15] = info->smp_loader_start;
} }
@ -180,7 +181,8 @@ static inline bool have_dtb(const struct arm_boot_info *info)
} }
#define WRITE_WORD(p, value) do { \ #define WRITE_WORD(p, value) do { \
stl_phys_notdirty(&address_space_memory, p, value); \ address_space_stl_notdirty(&address_space_memory, p, value, \
MEMTXATTRS_UNSPECIFIED, NULL); \
p += 4; \ p += 4; \
} while (0) } while (0)

12
hw/arm/highbank.c
View File

@ -69,11 +69,17 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
switch (info->nb_cpus) { switch (info->nb_cpus) {
case 4: case 4:
stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0); address_space_stl_notdirty(&address_space_memory,
SMP_BOOT_REG + 0x30, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
case 3: case 3:
stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0); address_space_stl_notdirty(&address_space_memory,
SMP_BOOT_REG + 0x20, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
case 2: case 2:
stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0); address_space_stl_notdirty(&address_space_memory,
SMP_BOOT_REG + 0x10, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
env->regs[15] = SMP_BOOT_ADDR; env->regs[15] = SMP_BOOT_ADDR;
break; break;
default: default:

20
hw/dma/pl080.c
View File

@ -205,10 +205,22 @@ again:
if (size == 0) { if (size == 0) {
/* Transfer complete. */ /* Transfer complete. */
if (ch->lli) { if (ch->lli) {
ch->src = ldl_le_phys(&address_space_memory, ch->lli); ch->src = address_space_ldl_le(&address_space_memory,
ch->dest = ldl_le_phys(&address_space_memory, ch->lli + 4); ch->lli,
ch->ctrl = ldl_le_phys(&address_space_memory, ch->lli + 12); MEMTXATTRS_UNSPECIFIED,
ch->lli = ldl_le_phys(&address_space_memory, ch->lli + 8); NULL);
ch->dest = address_space_ldl_le(&address_space_memory,
ch->lli + 4,
MEMTXATTRS_UNSPECIFIED,
NULL);
ch->ctrl = address_space_ldl_le(&address_space_memory,
ch->lli + 12,
MEMTXATTRS_UNSPECIFIED,
NULL);
ch->lli = address_space_ldl_le(&address_space_memory,
ch->lli + 8,
MEMTXATTRS_UNSPECIFIED,
NULL);
} else { } else {
ch->conf &= ~PL080_CCONF_E; ch->conf &= ~PL080_CCONF_E;
} }

3
hw/dma/sun4m_iommu.c
View File

@ -263,7 +263,8 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, hwaddr addr)
iopte = s->regs[IOMMU_BASE] << 4; iopte = s->regs[IOMMU_BASE] << 4;
addr &= ~s->iostart; addr &= ~s->iostart;
iopte += (addr >> (IOMMU_PAGE_SHIFT - 2)) & ~3; iopte += (addr >> (IOMMU_PAGE_SHIFT - 2)) & ~3;
ret = ldl_be_phys(&address_space_memory, iopte); ret = address_space_ldl_be(&address_space_memory, iopte,
MEMTXATTRS_UNSPECIFIED, NULL);
trace_sun4m_iommu_page_get_flags(pa, iopte, ret); trace_sun4m_iommu_page_get_flags(pa, iopte, ret);
return ret; return ret;
} }

3
hw/i386/intel_iommu.c
View File

@ -246,7 +246,8 @@ static void vtd_generate_interrupt(IntelIOMMUState *s, hwaddr mesg_addr_reg,
data = vtd_get_long_raw(s, mesg_data_reg); data = vtd_get_long_raw(s, mesg_data_reg);
VTD_DPRINTF(FLOG, "msi: addr 0x%"PRIx64 " data 0x%"PRIx32, addr, data); VTD_DPRINTF(FLOG, "msi: addr 0x%"PRIx64 " data 0x%"PRIx32, addr, data);
stl_le_phys(&address_space_memory, addr, data); address_space_stl_le(&address_space_memory, addr, data,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
/* Generate a fault event to software via MSI if conditions are met. /* Generate a fault event to software via MSI if conditions are met.

3
hw/pci-host/apb.c
View File

@ -289,7 +289,8 @@ static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr,
} }
} }
tte = ldq_be_phys(&address_space_memory, baseaddr + offset); tte = address_space_ldq_be(&address_space_memory, baseaddr + offset,
MEMTXATTRS_UNSPECIFIED, NULL);
if (!(tte & IOMMU_TTE_DATA_V)) { if (!(tte & IOMMU_TTE_DATA_V)) {
/* Invalid mapping */ /* Invalid mapping */

3
hw/pci/msi.c
View File

@ -291,7 +291,8 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
"notify vector 0x%x" "notify vector 0x%x"
" address: 0x%"PRIx64" data: 0x%"PRIx32"\n", " address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
vector, msg.address, msg.data); vector, msg.address, msg.data);
stl_le_phys(&dev->bus_master_as, msg.address, msg.data); address_space_stl_le(&dev->bus_master_as, msg.address, msg.data,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
/* Normally called by pci_default_write_config(). */ /* Normally called by pci_default_write_config(). */

3
hw/pci/msix.c
View File

@ -435,7 +435,8 @@ void msix_notify(PCIDevice *dev, unsigned vector)
msg = msix_get_message(dev, vector); msg = msix_get_message(dev, vector);
stl_le_phys(&dev->bus_master_as, msg.address, msg.data); address_space_stl_le(&dev->bus_master_as, msg.address, msg.data,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
void msix_reset(PCIDevice *dev) void msix_reset(PCIDevice *dev)

19
hw/s390x/css.c
View File

@ -745,20 +745,27 @@ static void css_update_chnmon(SubchDev *sch)
/* Format 1, per-subchannel area. */ /* Format 1, per-subchannel area. */
uint32_t count; uint32_t count;
count = ldl_phys(&address_space_memory, sch->curr_status.mba); count = address_space_ldl(&address_space_memory,
sch->curr_status.mba,
MEMTXATTRS_UNSPECIFIED,
NULL);
count++; count++;
stl_phys(&address_space_memory, sch->curr_status.mba, count); address_space_stl(&address_space_memory, sch->curr_status.mba, count,
MEMTXATTRS_UNSPECIFIED, NULL);
} else { } else {
/* Format 0, global area. */ /* Format 0, global area. */
uint32_t offset; uint32_t offset;
uint16_t count; uint16_t count;
offset = sch->curr_status.pmcw.mbi << 5; offset = sch->curr_status.pmcw.mbi << 5;
count = lduw_phys(&address_space_memory, count = address_space_lduw(&address_space_memory,
channel_subsys->chnmon_area + offset); channel_subsys->chnmon_area + offset,
MEMTXATTRS_UNSPECIFIED,
NULL);
count++; count++;
stw_phys(&address_space_memory, address_space_stw(&address_space_memory,
channel_subsys->chnmon_area + offset, count); channel_subsys->chnmon_area + offset, count,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
} }

9
hw/s390x/s390-pci-bus.c
View File

@ -278,7 +278,8 @@ static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
px = calc_px(guest_dma_address); px = calc_px(guest_dma_address);
sto_a = guest_iota + rtx * sizeof(uint64_t); sto_a = guest_iota + rtx * sizeof(uint64_t);
sto = ldq_phys(&address_space_memory, sto_a); sto = address_space_ldq(&address_space_memory, sto_a,
MEMTXATTRS_UNSPECIFIED, NULL);
sto = get_rt_sto(sto); sto = get_rt_sto(sto);
if (!sto) { if (!sto) {
pte = 0; pte = 0;
@ -286,7 +287,8 @@ static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
} }
pto_a = sto + sx * sizeof(uint64_t); pto_a = sto + sx * sizeof(uint64_t);
pto = ldq_phys(&address_space_memory, pto_a); pto = address_space_ldq(&address_space_memory, pto_a,
MEMTXATTRS_UNSPECIFIED, NULL);
pto = get_st_pto(pto); pto = get_st_pto(pto);
if (!pto) { if (!pto) {
pte = 0; pte = 0;
@ -294,7 +296,8 @@ static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
} }
px_a = pto + px * sizeof(uint64_t); px_a = pto + px * sizeof(uint64_t);
pte = ldq_phys(&address_space_memory, px_a); pte = address_space_ldq(&address_space_memory, px_a,
MEMTXATTRS_UNSPECIFIED, NULL);
out: out:
return pte; return pte;

69
hw/s390x/s390-virtio-bus.c
View File

@ -75,10 +75,12 @@ void s390_virtio_reset_idx(VirtIOS390Device *dev)
for (i = 0; i < num_vq; i++) { for (i = 0; i < num_vq; i++) {
idx_addr = virtio_queue_get_avail_addr(dev->vdev, i) + idx_addr = virtio_queue_get_avail_addr(dev->vdev, i) +
VIRTIO_VRING_AVAIL_IDX_OFFS; VIRTIO_VRING_AVAIL_IDX_OFFS;
stw_phys(&address_space_memory, idx_addr, 0); address_space_stw(&address_space_memory, idx_addr, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
idx_addr = virtio_queue_get_used_addr(dev->vdev, i) + idx_addr = virtio_queue_get_used_addr(dev->vdev, i) +
VIRTIO_VRING_USED_IDX_OFFS; VIRTIO_VRING_USED_IDX_OFFS;
stw_phys(&address_space_memory, idx_addr, 0); address_space_stw(&address_space_memory, idx_addr, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
} }
@ -336,7 +338,8 @@ static uint64_t s390_virtio_device_vq_token(VirtIOS390Device *dev, int vq)
(vq * VIRTIO_VQCONFIG_LEN) + (vq * VIRTIO_VQCONFIG_LEN) +
VIRTIO_VQCONFIG_OFFS_TOKEN; VIRTIO_VQCONFIG_OFFS_TOKEN;
return ldq_be_phys(&address_space_memory, token_off); return address_space_ldq_be(&address_space_memory, token_off,
MEMTXATTRS_UNSPECIFIED, NULL);
} }
static ram_addr_t s390_virtio_device_num_vq(VirtIOS390Device *dev) static ram_addr_t s390_virtio_device_num_vq(VirtIOS390Device *dev)
@ -371,21 +374,33 @@ void s390_virtio_device_sync(VirtIOS390Device *dev)
virtio_reset(dev->vdev); virtio_reset(dev->vdev);
/* Sync dev space */ /* Sync dev space */
stb_phys(&address_space_memory, address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_TYPE, dev->vdev->device_id); dev->dev_offs + VIRTIO_DEV_OFFS_TYPE,
dev->vdev->device_id,
MEMTXATTRS_UNSPECIFIED,
NULL);
stb_phys(&address_space_memory, address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_NUM_VQ, dev->dev_offs + VIRTIO_DEV_OFFS_NUM_VQ,
s390_virtio_device_num_vq(dev)); s390_virtio_device_num_vq(dev),
stb_phys(&address_space_memory, MEMTXATTRS_UNSPECIFIED,
dev->dev_offs + VIRTIO_DEV_OFFS_FEATURE_LEN, dev->feat_len); NULL);
address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_FEATURE_LEN,
dev->feat_len,
MEMTXATTRS_UNSPECIFIED,
NULL);
stb_phys(&address_space_memory, address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_CONFIG_LEN, dev->vdev->config_len); dev->dev_offs + VIRTIO_DEV_OFFS_CONFIG_LEN,
dev->vdev->config_len,
MEMTXATTRS_UNSPECIFIED,
NULL);
num_vq = s390_virtio_device_num_vq(dev); num_vq = s390_virtio_device_num_vq(dev);
stb_phys(&address_space_memory, address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_NUM_VQ, num_vq); dev->dev_offs + VIRTIO_DEV_OFFS_NUM_VQ, num_vq,
MEMTXATTRS_UNSPECIFIED, NULL);
/* Sync virtqueues */ /* Sync virtqueues */
for (i = 0; i < num_vq; i++) { for (i = 0; i < num_vq; i++) {
@ -396,11 +411,14 @@ void s390_virtio_device_sync(VirtIOS390Device *dev)
vring = s390_virtio_next_ring(bus); vring = s390_virtio_next_ring(bus);
virtio_queue_set_addr(dev->vdev, i, vring); virtio_queue_set_addr(dev->vdev, i, vring);
virtio_queue_set_vector(dev->vdev, i, i); virtio_queue_set_vector(dev->vdev, i, i);
stq_be_phys(&address_space_memory, address_space_stq_be(&address_space_memory,
vq + VIRTIO_VQCONFIG_OFFS_ADDRESS, vring); vq + VIRTIO_VQCONFIG_OFFS_ADDRESS, vring,
stw_be_phys(&address_space_memory, MEMTXATTRS_UNSPECIFIED, NULL);
vq + VIRTIO_VQCONFIG_OFFS_NUM, address_space_stw_be(&address_space_memory,
virtio_queue_get_num(dev->vdev, i)); vq + VIRTIO_VQCONFIG_OFFS_NUM,
virtio_queue_get_num(dev->vdev, i),
MEMTXATTRS_UNSPECIFIED,
NULL);
} }
cur_offs = dev->dev_offs; cur_offs = dev->dev_offs;
@ -408,7 +426,8 @@ void s390_virtio_device_sync(VirtIOS390Device *dev)
cur_offs += num_vq * VIRTIO_VQCONFIG_LEN; cur_offs += num_vq * VIRTIO_VQCONFIG_LEN;
/* Sync feature bitmap */ /* Sync feature bitmap */
stl_le_phys(&address_space_memory, cur_offs, dev->host_features); address_space_stl_le(&address_space_memory, cur_offs, dev->host_features,
MEMTXATTRS_UNSPECIFIED, NULL);
dev->feat_offs = cur_offs + dev->feat_len; dev->feat_offs = cur_offs + dev->feat_len;
cur_offs += dev->feat_len * 2; cur_offs += dev->feat_len * 2;
@ -426,12 +445,16 @@ void s390_virtio_device_update_status(VirtIOS390Device *dev)
VirtIODevice *vdev = dev->vdev; VirtIODevice *vdev = dev->vdev;
uint32_t features; uint32_t features;
virtio_set_status(vdev, ldub_phys(&address_space_memory, virtio_set_status(vdev,
dev->dev_offs + VIRTIO_DEV_OFFS_STATUS)); address_space_ldub(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_STATUS,
MEMTXATTRS_UNSPECIFIED, NULL));
/* Update guest supported feature bitmap */ /* Update guest supported feature bitmap */
features = bswap32(ldl_be_phys(&address_space_memory, dev->feat_offs)); features = bswap32(address_space_ldl_be(&address_space_memory,
dev->feat_offs,
MEMTXATTRS_UNSPECIFIED, NULL));
virtio_set_features(vdev, features); virtio_set_features(vdev, features);
} }

4
hw/s390x/s390-virtio.c
View File

@ -97,7 +97,9 @@ static int s390_virtio_hcall_reset(const uint64_t *args)
return -EINVAL; return -EINVAL;
} }
virtio_reset(dev->vdev); virtio_reset(dev->vdev);
stb_phys(&address_space_memory, dev->dev_offs + VIRTIO_DEV_OFFS_STATUS, 0); address_space_stb(&address_space_memory,
dev->dev_offs + VIRTIO_DEV_OFFS_STATUS, 0,
MEMTXATTRS_UNSPECIFIED, NULL);
s390_virtio_device_sync(dev); s390_virtio_device_sync(dev);
s390_virtio_reset_idx(dev); s390_virtio_reset_idx(dev);

87
hw/s390x/virtio-ccw.c
View File

@ -335,16 +335,23 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
info.queue = ldq_phys(&address_space_memory, ccw.cda); info.queue = address_space_ldq(&address_space_memory, ccw.cda,
info.align = ldl_phys(&address_space_memory, MEMTXATTRS_UNSPECIFIED, NULL);
ccw.cda + sizeof(info.queue)); info.align = address_space_ldl(&address_space_memory,
info.index = lduw_phys(&address_space_memory, ccw.cda + sizeof(info.queue),
ccw.cda + sizeof(info.queue) MEMTXATTRS_UNSPECIFIED,
+ sizeof(info.align)); NULL);
info.num = lduw_phys(&address_space_memory, info.index = address_space_lduw(&address_space_memory,
ccw.cda + sizeof(info.queue) ccw.cda + sizeof(info.queue)
+ sizeof(info.align) + sizeof(info.align),
+ sizeof(info.index)); MEMTXATTRS_UNSPECIFIED,
NULL);
info.num = address_space_lduw(&address_space_memory,
ccw.cda + sizeof(info.queue)
+ sizeof(info.align)
+ sizeof(info.index),
MEMTXATTRS_UNSPECIFIED,
NULL);
ret = virtio_ccw_set_vqs(sch, info.queue, info.align, info.index, ret = virtio_ccw_set_vqs(sch, info.queue, info.align, info.index,
info.num); info.num);
sch->curr_status.scsw.count = 0; sch->curr_status.scsw.count = 0;
@ -369,15 +376,20 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
features.index = ldub_phys(&address_space_memory, features.index = address_space_ldub(&address_space_memory,
ccw.cda + sizeof(features.features)); ccw.cda
+ sizeof(features.features),
MEMTXATTRS_UNSPECIFIED,
NULL);
if (features.index < ARRAY_SIZE(dev->host_features)) { if (features.index < ARRAY_SIZE(dev->host_features)) {
features.features = dev->host_features[features.index]; features.features = dev->host_features[features.index];
} else { } else {
/* Return zeroes if the guest supports more feature bits. */ /* Return zeroes if the guest supports more feature bits. */
features.features = 0; features.features = 0;
} }
stl_le_phys(&address_space_memory, ccw.cda, features.features); address_space_stl_le(&address_space_memory, ccw.cda,
features.features, MEMTXATTRS_UNSPECIFIED,
NULL);
sch->curr_status.scsw.count = ccw.count - sizeof(features); sch->curr_status.scsw.count = ccw.count - sizeof(features);
ret = 0; ret = 0;
} }
@ -396,9 +408,15 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
features.index = ldub_phys(&address_space_memory, features.index = address_space_ldub(&address_space_memory,
ccw.cda + sizeof(features.features)); ccw.cda
features.features = ldl_le_phys(&address_space_memory, ccw.cda); + sizeof(features.features),
MEMTXATTRS_UNSPECIFIED,
NULL);
features.features = address_space_ldl_le(&address_space_memory,
ccw.cda,
MEMTXATTRS_UNSPECIFIED,
NULL);
if (features.index < ARRAY_SIZE(dev->host_features)) { if (features.index < ARRAY_SIZE(dev->host_features)) {
virtio_set_features(vdev, features.features); virtio_set_features(vdev, features.features);
} else { } else {
@ -474,7 +492,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
status = ldub_phys(&address_space_memory, ccw.cda); status = address_space_ldub(&address_space_memory, ccw.cda,
MEMTXATTRS_UNSPECIFIED, NULL);
if (!(status & VIRTIO_CONFIG_S_DRIVER_OK)) { if (!(status & VIRTIO_CONFIG_S_DRIVER_OK)) {
virtio_ccw_stop_ioeventfd(dev); virtio_ccw_stop_ioeventfd(dev);
} }
@ -508,7 +527,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
indicators = ldq_be_phys(&address_space_memory, ccw.cda); indicators = address_space_ldq_be(&address_space_memory, ccw.cda,
MEMTXATTRS_UNSPECIFIED, NULL);
dev->indicators = get_indicator(indicators, sizeof(uint64_t)); dev->indicators = get_indicator(indicators, sizeof(uint64_t));
sch->curr_status.scsw.count = ccw.count - sizeof(indicators); sch->curr_status.scsw.count = ccw.count - sizeof(indicators);
ret = 0; ret = 0;
@ -528,7 +548,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
indicators = ldq_be_phys(&address_space_memory, ccw.cda); indicators = address_space_ldq_be(&address_space_memory, ccw.cda,
MEMTXATTRS_UNSPECIFIED, NULL);
dev->indicators2 = get_indicator(indicators, sizeof(uint64_t)); dev->indicators2 = get_indicator(indicators, sizeof(uint64_t));
sch->curr_status.scsw.count = ccw.count - sizeof(indicators); sch->curr_status.scsw.count = ccw.count - sizeof(indicators);
ret = 0; ret = 0;
@ -548,15 +569,21 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
if (!ccw.cda) { if (!ccw.cda) {
ret = -EFAULT; ret = -EFAULT;
} else { } else {
vq_config.index = lduw_be_phys(&address_space_memory, ccw.cda); vq_config.index = address_space_lduw_be(&address_space_memory,
ccw.cda,
MEMTXATTRS_UNSPECIFIED,
NULL);
if (vq_config.index >= VIRTIO_PCI_QUEUE_MAX) { if (vq_config.index >= VIRTIO_PCI_QUEUE_MAX) {
ret = -EINVAL; ret = -EINVAL;
break; break;
} }
vq_config.num_max = virtio_queue_get_num(vdev, vq_config.num_max = virtio_queue_get_num(vdev,
vq_config.index); vq_config.index);
stw_be_phys(&address_space_memory, address_space_stw_be(&address_space_memory,
ccw.cda + sizeof(vq_config.index), vq_config.num_max); ccw.cda + sizeof(vq_config.index),
vq_config.num_max,
MEMTXATTRS_UNSPECIFIED,
NULL);
sch->curr_status.scsw.count = ccw.count - sizeof(vq_config); sch->curr_status.scsw.count = ccw.count - sizeof(vq_config);
ret = 0; ret = 0;
} }
@ -1068,9 +1095,13 @@ static void virtio_ccw_notify(DeviceState *d, uint16_t vector)
css_adapter_interrupt(dev->thinint_isc); css_adapter_interrupt(dev->thinint_isc);
} }
} else { } else {
indicators = ldq_phys(&address_space_memory, dev->indicators->addr); indicators = address_space_ldq(&address_space_memory,
dev->indicators->addr,
MEMTXATTRS_UNSPECIFIED,
NULL);
indicators |= 1ULL << vector; indicators |= 1ULL << vector;
stq_phys(&address_space_memory, dev->indicators->addr, indicators); address_space_stq(&address_space_memory, dev->indicators->addr,
indicators, MEMTXATTRS_UNSPECIFIED, NULL);
css_conditional_io_interrupt(sch); css_conditional_io_interrupt(sch);
} }
} else { } else {
@ -1078,9 +1109,13 @@ static void virtio_ccw_notify(DeviceState *d, uint16_t vector)
return; return;
} }
vector = 0; vector = 0;
indicators = ldq_phys(&address_space_memory, dev->indicators2->addr); indicators = address_space_ldq(&address_space_memory,
dev->indicators2->addr,
MEMTXATTRS_UNSPECIFIED,
NULL);
indicators |= 1ULL << vector; indicators |= 1ULL << vector;
stq_phys(&address_space_memory, dev->indicators2->addr, indicators); address_space_stq(&address_space_memory, dev->indicators2->addr,
indicators, MEMTXATTRS_UNSPECIFIED, NULL);
css_conditional_io_interrupt(sch); css_conditional_io_interrupt(sch);
} }
} }

6
hw/sh4/r2d.c
View File

@ -318,8 +318,10 @@ static void r2d_init(MachineState *machine)
} }
/* initialization which should be done by firmware */ /* initialization which should be done by firmware */
stl_phys(&address_space_memory, SH7750_BCR1, 1<<3); /* cs3 SDRAM */ address_space_stl(&address_space_memory, SH7750_BCR1, 1 << 3,
stw_phys(&address_space_memory, SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */ MEMTXATTRS_UNSPECIFIED, NULL); /* cs3 SDRAM */
address_space_stw(&address_space_memory, SH7750_BCR2, 3 << (3 * 2),
MEMTXATTRS_UNSPECIFIED, NULL); /* cs3 32bit */
reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */ reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */
} }

5
hw/timer/hpet.c
View File

@ -206,8 +206,9 @@ static void update_irq(struct HPETTimer *timer, int set)
} }
} }
} else if (timer_fsb_route(timer)) { } else if (timer_fsb_route(timer)) {
stl_le_phys(&address_space_memory, address_space_stl_le(&address_space_memory, timer->fsb >> 32,
timer->fsb >> 32, timer->fsb & 0xffffffff); timer->fsb & 0xffffffff, MEMTXATTRS_UNSPECIFIED,
NULL);
} else if (timer->config & HPET_TN_TYPE_LEVEL) { } else if (timer->config & HPET_TN_TYPE_LEVEL) {
s->isr |= mask; s->isr |= mask;
/* fold the ICH PIRQ# pin's internal inversion logic into hpet */ /* fold the ICH PIRQ# pin's internal inversion logic into hpet */

3
monitor.c
View File

@ -1385,7 +1385,8 @@ static void hmp_sum(Monitor *mon, const QDict *qdict)
sum = 0; sum = 0;
for(addr = start; addr < (start + size); addr++) { for(addr = start; addr < (start + size); addr++) {
uint8_t val = ldub_phys(&address_space_memory, addr); uint8_t val = address_space_ldub(&address_space_memory, addr,
MEMTXATTRS_UNSPECIFIED, NULL);
/* BSD sum algorithm ('sum' Unix command) */ /* BSD sum algorithm ('sum' Unix command) */
sum = (sum >> 1) | (sum << 15); sum = (sum >> 1) | (sum << 15);
sum += val; sum += val;

15
target-i386/arch_memory_mapping.c
View File

@ -27,7 +27,7 @@ static void walk_pte(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 512; i++) { for (i = 0; i < 512; i++) {
pte_addr = (pte_start_addr + i * 8) & a20_mask; pte_addr = (pte_start_addr + i * 8) & a20_mask;
pte = ldq_phys(as, pte_addr); pte = address_space_ldq(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pte & PG_PRESENT_MASK)) { if (!(pte & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -57,7 +57,7 @@ static void walk_pte2(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 1024; i++) { for (i = 0; i < 1024; i++) {
pte_addr = (pte_start_addr + i * 4) & a20_mask; pte_addr = (pte_start_addr + i * 4) & a20_mask;
pte = ldl_phys(as, pte_addr); pte = address_space_ldl(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pte & PG_PRESENT_MASK)) { if (!(pte & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -89,7 +89,7 @@ static void walk_pde(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 512; i++) { for (i = 0; i < 512; i++) {
pde_addr = (pde_start_addr + i * 8) & a20_mask; pde_addr = (pde_start_addr + i * 8) & a20_mask;
pde = ldq_phys(as, pde_addr); pde = address_space_ldq(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pde & PG_PRESENT_MASK)) { if (!(pde & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -126,7 +126,7 @@ static void walk_pde2(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 1024; i++) { for (i = 0; i < 1024; i++) {
pde_addr = (pde_start_addr + i * 4) & a20_mask; pde_addr = (pde_start_addr + i * 4) & a20_mask;
pde = ldl_phys(as, pde_addr); pde = address_space_ldl(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pde & PG_PRESENT_MASK)) { if (!(pde & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -167,7 +167,7 @@ static void walk_pdpe2(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask;
pdpe = ldq_phys(as, pdpe_addr); pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pdpe & PG_PRESENT_MASK)) { if (!(pdpe & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -192,7 +192,7 @@ static void walk_pdpe(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 512; i++) { for (i = 0; i < 512; i++) {
pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask;
pdpe = ldq_phys(as, pdpe_addr); pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL);
if (!(pdpe & PG_PRESENT_MASK)) { if (!(pdpe & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;
@ -228,7 +228,8 @@ static void walk_pml4e(MemoryMappingList *list, AddressSpace *as,
for (i = 0; i < 512; i++) { for (i = 0; i < 512; i++) {
pml4e_addr = (pml4e_start_addr + i * 8) & a20_mask; pml4e_addr = (pml4e_start_addr + i * 8) & a20_mask;
pml4e = ldq_phys(as, pml4e_addr); pml4e = address_space_ldq(as, pml4e_addr, MEMTXATTRS_UNSPECIFIED,
NULL);
if (!(pml4e & PG_PRESENT_MASK)) { if (!(pml4e & PG_PRESENT_MASK)) {
/* not present */ /* not present */
continue; continue;