target/arm: Allow users to set the number of VFP registers

Cortex A7 CPUs with an FPU implementing VFPv4 without NEON support
have 16 64-bit FPU registers and not 32 registers. Let users set the
number of VFP registers with a CPU property.

The primary use case of this property is for the Cortex A7 of the
Aspeed AST2600 SoC.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Cédric Le Goater 2023-06-07 06:39:43 +02:00
parent f65f6ad5a7
commit 42bea956f6
3 changed files with 36 additions and 0 deletions

View File

@ -316,6 +316,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->cpu[i]), "neon", false,
&error_abort);
object_property_set_bool(OBJECT(&s->cpu[i]), "vfp-d32", false,
&error_abort);
object_property_set_link(OBJECT(&s->cpu[i]), "memory",
OBJECT(s->memory), &error_abort);

View File

@ -1277,6 +1277,9 @@ static Property arm_cpu_cfgend_property =
static Property arm_cpu_has_vfp_property =
DEFINE_PROP_BOOL("vfp", ARMCPU, has_vfp, true);
static Property arm_cpu_has_vfp_d32_property =
DEFINE_PROP_BOOL("vfp-d32", ARMCPU, has_vfp_d32, true);
static Property arm_cpu_has_neon_property =
DEFINE_PROP_BOOL("neon", ARMCPU, has_neon, true);
@ -1408,6 +1411,22 @@ void arm_cpu_post_init(Object *obj)
}
}
if (cpu->has_vfp && cpu_isar_feature(aa32_simd_r32, cpu)) {
cpu->has_vfp_d32 = true;
if (!kvm_enabled()) {
/*
* The permitted values of the SIMDReg bits [3:0] on
* Armv8-A are either 0b0000 and 0b0010. On such CPUs,
* make sure that has_vfp_d32 can not be set to false.
*/
if (!(arm_feature(&cpu->env, ARM_FEATURE_V8) &&
!arm_feature(&cpu->env, ARM_FEATURE_M))) {
qdev_property_add_static(DEVICE(obj),
&arm_cpu_has_vfp_d32_property);
}
}
}
if (arm_feature(&cpu->env, ARM_FEATURE_NEON)) {
cpu->has_neon = true;
if (!kvm_enabled()) {
@ -1674,6 +1693,19 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
if (cpu->has_vfp_d32 != cpu->has_neon) {
error_setg(errp, "ARM CPUs must have both VFP-D32 and Neon or neither");
return;
}
if (!cpu->has_vfp_d32) {
uint32_t u;
u = cpu->isar.mvfr0;
u = FIELD_DP32(u, MVFR0, SIMDREG, 1); /* 16 registers */
cpu->isar.mvfr0 = u;
}
if (!cpu->has_vfp) {
uint64_t t;
uint32_t u;

View File

@ -924,6 +924,8 @@ struct ArchCPU {
bool has_pmu;
/* CPU has VFP */
bool has_vfp;
/* CPU has 32 VFP registers */
bool has_vfp_d32;
/* CPU has Neon */
bool has_neon;
/* CPU has M-profile DSP extension */