target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11

Unlike many other bits in HCR_EL2, the description for this
bit does not contain the phrase "if ... this field behaves
as 0 for all purposes other than", so do not squash the bit
in arm_hcr_el2_eff.

Instead, replicate the E2H+TGE test in the two places that
require it.

Reported-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Tested-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-id: 20201008162155.161886-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2020-10-08 11:21:55 -05:00 committed by Peter Maydell
parent 50244cc76a
commit 4301acd7d7
2 changed files with 10 additions and 8 deletions

View File

@ -6906,11 +6906,12 @@ static CPAccessResult access_mte(CPUARMState *env, const ARMCPRegInfo *ri,
{
int el = arm_current_el(env);
if (el < 2 &&
arm_feature(env, ARM_FEATURE_EL2) &&
!(arm_hcr_el2_eff(env) & HCR_ATA)) {
if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
uint64_t hcr = arm_hcr_el2_eff(env);
if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) {
return CP_ACCESS_TRAP_EL2;
}
}
if (el < 3 &&
arm_feature(env, ARM_FEATURE_EL3) &&
!(env->cp15.scr_el3 & SCR_ATA)) {

View File

@ -1252,11 +1252,12 @@ static inline bool allocation_tag_access_enabled(CPUARMState *env, int el,
&& !(env->cp15.scr_el3 & SCR_ATA)) {
return false;
}
if (el < 2
&& arm_feature(env, ARM_FEATURE_EL2)
&& !(arm_hcr_el2_eff(env) & HCR_ATA)) {
if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
uint64_t hcr = arm_hcr_el2_eff(env);
if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) {
return false;
}
}
sctlr &= (el == 0 ? SCTLR_ATA0 : SCTLR_ATA);
return sctlr != 0;
}