OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

make display updates thread safe, batch #2

Browse Source 
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJZFHgvAAoJEEy22O7T6HE4744P/jzTCZRV40/lQ//NVKW05HGN
 OlrvTt3gLG20TAgZqNR4jgocrTi0fBkvCnret1Q1rwgp2dBRZ1mTmxpxVH9HJL7A
 kHvSNmOT2qfpxQGKxe+ZucLOWvLsJAL9SjzdHJ7A5+09KfKBtLNL93avYqw5erPt
 la6Nf9j6Dhi/OCD6AU+aTyBWEn1awrhNrRGMO9Z+pzF2VaVQ5V5lejGU1jvWmXiE
 Tq+xCa/oOe/tmLYsZw9CiWM44WMMC5fOTksY/wGs53HMayAkoFHJoba4MMyArmOv
 xFw/iR2IesjJXRfTda8cdp+GbqZTBZYgdaABl3trMl4TR36CrNxcXehGsU+eiCOG
 pdJ6QOTNJ/QJ3fWssC9X5tT+DbqjFc934ewXAHbVIDQ63dac3AaazeOeEzD8CF6R
 TzWd/nS79GRwo67HOeJTTGeQCGWBe/Ca8MUd2HItQyUUDIe1dllXf2cUHd5Ml9Pf
 4SoH7EEaKC9ZXfpN50duOaSI3UflcyAN2EWXeV5XxtwPPdvXXEm3LO/Uzjh5QgYH
 +V5FFsNmGnEn/vMp4nfuCiuZhScIH3BOVXFGAHuxuXnVw0F1cy9GLKpLKHxfQuZC
 gC03p0GcMkmyPmoXIiNc8ASyXBar6tMdz0PjRfKi2r4UTp1ZTjzM9EaF29KE2AXT
 WsEHAb++2mfb8gNH6J7Y
 =78eq
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'kraxel/tags/pull-vga-20170511-1' into staging

make display updates thread safe, batch #2

# gpg: Signature made Thu 11 May 2017 03:41:51 PM BST
# gpg:                using RSA key 0x4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* kraxel/tags/pull-vga-20170511-1:
  vga: fix display update region calculation
  sm501: make display updates thread safe
  tcx: make display updates thread safe
  cg3: make display updates thread safe

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2017-05-15 14:07:01 +01:00
commit 43ad494c04
4 changed files with 53 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

41
hw/display/cg3.c
View File

@ -94,7 +94,8 @@ static void cg3_update_display(void *opaque)
uint32_t dval;
int x, y, y_start;
unsigned int width, height;
ram_addr_t page, page_min, page_max;
ram_addr_t page;
DirtyBitmapSnapshot *snap = NULL;
if (surface_bits_per_pixel(surface) != 32) {
return;
@ -103,29 +104,32 @@ static void cg3_update_display(void *opaque)
height = s->height;
y_start = -1;
page_min = -1;
page_max = 0;
page = 0;
pix = memory_region_get_ram_ptr(&s->vram_mem);
data = (uint32_t *)surface_data(surface);
memory_region_sync_dirty_bitmap(&s->vram_mem);
if (!s->full_update) {
memory_region_sync_dirty_bitmap(&s->vram_mem);
snap = memory_region_snapshot_and_clear_dirty(&s->vram_mem, 0x0,
memory_region_size(&s->vram_mem),
DIRTY_MEMORY_VGA);
}
for (y = 0; y < height; y++) {
int update = s->full_update;
int update;
page = (ram_addr_t)y * width;
update |= memory_region_get_dirty(&s->vram_mem, page, width,
DIRTY_MEMORY_VGA);
if (s->full_update) {
update = 1;
} else {
update = memory_region_snapshot_get_dirty(&s->vram_mem, snap, page,
width);
}
if (update) {
if (y_start < 0) {
y_start = y;
}
if (page < page_min) {
page_min = page;
}
if (page > page_max) {
page_max = page;
}
for (x = 0; x < width; x++) {
dval = *pix++;
@ -134,7 +138,7 @@ static void cg3_update_display(void *opaque)
}
} else {
if (y_start >= 0) {
dpy_gfx_update(s->con, 0, y_start, s->width, y - y_start);
dpy_gfx_update(s->con, 0, y_start, width, y - y_start);
y_start = -1;
}
pix += width;
@ -143,17 +147,14 @@ static void cg3_update_display(void *opaque)
}
s->full_update = 0;
if (y_start >= 0) {
dpy_gfx_update(s->con, 0, y_start, s->width, y - y_start);
}
if (page_max >= page_min) {
memory_region_reset_dirty(&s->vram_mem,
page_min, page_max - page_min, DIRTY_MEMORY_VGA);
dpy_gfx_update(s->con, 0, y_start, width, y - y_start);
}
/* vsync interrupt? */
if (s->regs[0] & CG3_CR_ENABLE_INTS) {
s->regs[1] |= CG3_SR_PENDING_INT;
qemu_irq_raise(s->irq);
}
g_free(snap);
}
static void cg3_invalidate_display(void *opaque)

27
hw/display/sm501.c
View File

@ -1414,6 +1414,7 @@ static void sm501_update_display(void *opaque)
{
SM501State *s = (SM501State *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
DirtyBitmapSnapshot *snap;
int y, c_x = 0, c_y = 0;
int crt = (s->dc_crt_control & SM501_DC_CRT_CONTROL_SEL) ? 1 : 0;
int width = get_width(s, crt);
@ -1425,9 +1426,7 @@ static void sm501_update_display(void *opaque)
draw_hwc_line_func *draw_hwc_line = NULL;
int full_update = 0;
int y_start = -1;
ram_addr_t page_min = ~0l;
ram_addr_t page_max = 0l;
ram_addr_t offset;
ram_addr_t offset = 0;
uint32_t *palette;
uint8_t hwc_palette[3 * 3];
uint8_t *hwc_src = NULL;
@ -1479,17 +1478,17 @@ static void sm501_update_display(void *opaque)
/* draw each line according to conditions */
memory_region_sync_dirty_bitmap(&s->local_mem_region);
snap = memory_region_snapshot_and_clear_dirty(&s->local_mem_region,
offset, width * height * src_bpp, DIRTY_MEMORY_VGA);
for (y = 0, offset = 0; y < height; y++, offset += width * src_bpp) {
int update, update_hwc;
ram_addr_t page0 = offset;
ram_addr_t page1 = offset + width * src_bpp - 1;
/* check if hardware cursor is enabled and we're within its range */
update_hwc = draw_hwc_line && c_y <= y && y < c_y + SM501_HWC_HEIGHT;
update = full_update || update_hwc;
/* check dirty flags for each line */
update |= memory_region_get_dirty(&s->local_mem_region, page0,
page1 - page0, DIRTY_MEMORY_VGA);
update |= memory_region_snapshot_get_dirty(&s->local_mem_region, snap,
offset, width * src_bpp);
/* draw line and change status */
if (update) {
@ -1507,12 +1506,6 @@ static void sm501_update_display(void *opaque)
if (y_start < 0) {
y_start = y;
}
if (page0 < page_min) {
page_min = page0;
}
if (page1 > page_max) {
page_max = page1;
}
} else {
if (y_start >= 0) {
/* flush to display */
@ -1521,18 +1514,12 @@ static void sm501_update_display(void *opaque)
}
}
}
g_free(snap);
/* complete flush to display */
if (y_start >= 0) {
dpy_gfx_update(s->con, 0, y_start, width, y - y_start);
}
/* clear dirty flags */
if (page_min != ~0l) {
memory_region_reset_dirty(&s->local_mem_region,
page_min, page_max + TARGET_PAGE_SIZE,
DIRTY_MEMORY_VGA);
}
}
static const GraphicHwOps sm501_ops = {

68
hw/display/tcx.c
View File

@ -104,36 +104,23 @@ static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len)
}
}
static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len)
static int tcx_check_dirty(TCXState *s, DirtyBitmapSnapshot *snap,
ram_addr_t addr, int len)
{
int ret;
ret = memory_region_get_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA);
ret = memory_region_snapshot_get_dirty(&s->vram_mem, snap, addr, len);
if (s->depth == 24) {
ret |= memory_region_get_dirty(&s->vram_mem,
s->vram24_offset + addr * 4, len * 4,
DIRTY_MEMORY_VGA);
ret |= memory_region_get_dirty(&s->vram_mem,
s->cplane_offset + addr * 4, len * 4,
DIRTY_MEMORY_VGA);
ret |= memory_region_snapshot_get_dirty(&s->vram_mem, snap,
s->vram24_offset + addr * 4, len * 4);
ret |= memory_region_snapshot_get_dirty(&s->vram_mem, snap,
s->cplane_offset + addr * 4, len * 4);
}
return ret;
}
static void tcx_reset_dirty(TCXState *s, ram_addr_t addr, int len)
{
memory_region_reset_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA);
if (s->depth == 24) {
memory_region_reset_dirty(&s->vram_mem, s->vram24_offset + addr * 4,
len * 4, DIRTY_MEMORY_VGA);
memory_region_reset_dirty(&s->vram_mem, s->cplane_offset + addr * 4,
len * 4, DIRTY_MEMORY_VGA);
}
}
static void update_palette_entries(TCXState *s, int start, int end)
{
DisplaySurface *surface = qemu_console_surface(s->con);
@ -233,7 +220,8 @@ static void tcx_update_display(void *opaque)
{
TCXState *ts = opaque;
DisplaySurface *surface = qemu_console_surface(ts->con);
ram_addr_t page, page_min, page_max;
ram_addr_t page;
DirtyBitmapSnapshot *snap = NULL;
int y, y_start, dd, ds;
uint8_t *d, *s;
@ -243,22 +231,20 @@ static void tcx_update_display(void *opaque)
page = 0;
y_start = -1;
page_min = -1;
page_max = 0;
d = surface_data(surface);
s = ts->vram;
dd = surface_stride(surface);
ds = 1024;
memory_region_sync_dirty_bitmap(&ts->vram_mem);
snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0,
memory_region_size(&ts->vram_mem),
DIRTY_MEMORY_VGA);
for (y = 0; y < ts->height; y++, page += ds) {
if (tcx_check_dirty(ts, page, ds)) {
if (tcx_check_dirty(ts, snap, page, ds)) {
if (y_start < 0)
y_start = y;
if (page < page_min)
page_min = page;
if (page > page_max)
page_max = page;
tcx_draw_line32(ts, d, s, ts->width);
if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) {
@ -280,17 +266,15 @@ static void tcx_update_display(void *opaque)
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
}
/* reset modified pages */
if (page_max >= page_min) {
tcx_reset_dirty(ts, page_min, page_max - page_min);
}
g_free(snap);
}
static void tcx24_update_display(void *opaque)
{
TCXState *ts = opaque;
DisplaySurface *surface = qemu_console_surface(ts->con);
ram_addr_t page, page_min, page_max;
ram_addr_t page;
DirtyBitmapSnapshot *snap = NULL;
int y, y_start, dd, ds;
uint8_t *d, *s;
uint32_t *cptr, *s24;
@ -301,8 +285,6 @@ static void tcx24_update_display(void *opaque)
page = 0;
y_start = -1;
page_min = -1;
page_max = 0;
d = surface_data(surface);
s = ts->vram;
s24 = ts->vram24;
@ -311,14 +293,15 @@ static void tcx24_update_display(void *opaque)
ds = 1024;
memory_region_sync_dirty_bitmap(&ts->vram_mem);
snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0,
memory_region_size(&ts->vram_mem),
DIRTY_MEMORY_VGA);
for (y = 0; y < ts->height; y++, page += ds) {
if (tcx_check_dirty(ts, page, ds)) {
if (tcx_check_dirty(ts, snap, page, ds)) {
if (y_start < 0)
y_start = y;
if (page < page_min)
page_min = page;
if (page > page_max)
page_max = page;
tcx24_draw_line32(ts, d, s, ts->width, cptr, s24);
if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) {
tcx_draw_cursor32(ts, d, y, ts->width);
@ -341,10 +324,7 @@ static void tcx24_update_display(void *opaque)
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
}
/* reset modified pages */
if (page_max >= page_min) {
tcx_reset_dirty(ts, page_min, page_max - page_min);
}
g_free(snap);
}
static void tcx_invalidate_display(void *opaque)

2
hw/display/vga.c
View File

@ -1630,7 +1630,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
if (!full_update) {
vga_sync_dirty_bitmap(s);
snap = memory_region_snapshot_and_clear_dirty(&s->vram, addr1,
bwidth * height,
line_offset * height,
DIRTY_MEMORY_VGA);
}