esp.c: keep track of the DRQ state during DMA
Currently the DRQ IRQ is updated every time DMA data is sent/received which is both inefficient and causes excessive logging of the DRQ state. Add a new drq_state bool that only updates the DRQ IRQ if its state changes. This commit adds the new drq_state bool to the migration state: since the version number has already been increased earlier in the series, there is no need to repeat it again here. The DRQ IRQ is (currently) only used for PDMA transfers which already have a migration break in this series so there are no problems setting its value post-load. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-87-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -62,14 +62,20 @@ static void esp_lower_irq(ESPState *s)
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static void esp_raise_drq(ESPState *s)
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{
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qemu_irq_raise(s->drq_irq);
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trace_esp_raise_drq();
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if (!(s->drq_state)) {
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qemu_irq_raise(s->drq_irq);
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trace_esp_raise_drq();
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s->drq_state = true;
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}
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}
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static void esp_lower_drq(ESPState *s)
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{
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qemu_irq_lower(s->drq_irq);
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trace_esp_lower_drq();
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if (s->drq_state) {
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qemu_irq_lower(s->drq_irq);
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trace_esp_lower_drq();
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s->drq_state = false;
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}
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}
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void esp_dma_enable(ESPState *s, int irq, int level)
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@ -1358,6 +1364,7 @@ const VMStateDescription vmstate_esp = {
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VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState,
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esp_is_between_version_5_and_6),
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VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6),
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VMSTATE_BOOL(drq_state, ESPState),
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VMSTATE_END_OF_LIST()
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},
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};
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@ -26,6 +26,7 @@ struct ESPState {
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uint8_t wregs[ESP_REGS];
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qemu_irq irq;
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qemu_irq drq_irq;
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bool drq_state;
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uint8_t chip_id;
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bool tchi_written;
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int32_t ti_size;
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