target/arm: Mark PMULL, FMMLA as non-streaming
Mark these as a non-streaming instructions, which should trap if full a64 support is not enabled in streaming mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -59,8 +59,6 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVTZS
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# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
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# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
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FAIL 0100 0101 000- ---- 0110 1--- ---- ---- # PMULLB, PMULLT (128b result)
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FAIL 0110 0100 --1- ---- 1110 01-- ---- ---- # FMMLA, BFMMLA
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FAIL 0110 0101 --0- ---- 0000 11-- ---- ---- # FTSMUL
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FAIL 0110 0101 --01 0--- 100- ---- ---- ---- # FTMAD
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FAIL 0110 0101 --01 1--- 001- ---- ---- ---- # FADDA
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@ -6186,9 +6186,13 @@ static bool do_trans_pmull(DisasContext *s, arg_rrr_esz *a, bool sel)
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gen_helper_gvec_pmull_q, gen_helper_sve2_pmull_h,
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NULL, gen_helper_sve2_pmull_d,
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};
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if (a->esz == 0
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? !dc_isar_feature(aa64_sve2_pmull128, s)
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: !dc_isar_feature(aa64_sve, s)) {
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if (a->esz == 0) {
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if (!dc_isar_feature(aa64_sve2_pmull128, s)) {
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return false;
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}
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s->is_nonstreaming = true;
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} else if (!dc_isar_feature(aa64_sve, s)) {
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return false;
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}
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return gen_gvec_ool_arg_zzz(s, fns[a->esz], a, sel);
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@ -7125,10 +7129,12 @@ DO_ZPZZ_FP(FMINP, aa64_sve2, sve2_fminp_zpzz)
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* SVE Integer Multiply-Add (unpredicated)
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*/
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TRANS_FEAT(FMMLA_s, aa64_sve_f32mm, gen_gvec_fpst_zzzz, gen_helper_fmmla_s,
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a->rd, a->rn, a->rm, a->ra, 0, FPST_FPCR)
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TRANS_FEAT(FMMLA_d, aa64_sve_f64mm, gen_gvec_fpst_zzzz, gen_helper_fmmla_d,
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a->rd, a->rn, a->rm, a->ra, 0, FPST_FPCR)
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TRANS_FEAT_NONSTREAMING(FMMLA_s, aa64_sve_f32mm, gen_gvec_fpst_zzzz,
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gen_helper_fmmla_s, a->rd, a->rn, a->rm, a->ra,
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0, FPST_FPCR)
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TRANS_FEAT_NONSTREAMING(FMMLA_d, aa64_sve_f64mm, gen_gvec_fpst_zzzz,
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gen_helper_fmmla_d, a->rd, a->rn, a->rm, a->ra,
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0, FPST_FPCR)
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static gen_helper_gvec_4 * const sqdmlal_zzzw_fns[] = {
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NULL, gen_helper_sve2_sqdmlal_zzzw_h,
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@ -7301,8 +7307,8 @@ TRANS_FEAT(BFDOT_zzzz, aa64_sve_bf16, gen_gvec_ool_arg_zzzz,
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TRANS_FEAT(BFDOT_zzxz, aa64_sve_bf16, gen_gvec_ool_arg_zzxz,
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gen_helper_gvec_bfdot_idx, a)
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TRANS_FEAT(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz,
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gen_helper_gvec_bfmmla, a, 0)
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TRANS_FEAT_NONSTREAMING(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz,
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gen_helper_gvec_bfmmla, a, 0)
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static bool do_BFMLAL_zzzw(DisasContext *s, arg_rrrr_esz *a, bool sel)
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{
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