target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
All remaining uses are strictly read-only. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1624,7 +1624,7 @@ static void glue(gen_, name)(DisasContext *ctx) \
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gen_exception(ctx, POWERPC_EXCP_VPU); \
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return; \
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} \
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uimm = tcg_const_i32(UIMM5(ctx->opcode)); \
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uimm = tcg_constant_i32(UIMM5(ctx->opcode)); \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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gen_helper_##name(cpu_env, rd, rb, uimm); \
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@ -1965,7 +1965,7 @@ static void gen_vsldoi(DisasContext *ctx)
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ra = gen_avr_ptr(rA(ctx->opcode));
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rb = gen_avr_ptr(rB(ctx->opcode));
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rd = gen_avr_ptr(rD(ctx->opcode));
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sh = tcg_const_i32(VSH(ctx->opcode));
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sh = tcg_constant_i32(VSH(ctx->opcode));
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gen_helper_vsldoi(rd, ra, rb, sh);
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}
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@ -2575,7 +2575,7 @@ static void gen_##op(DisasContext *ctx) \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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\
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ps = tcg_const_i32((ctx->opcode & 0x200) != 0); \
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ps = tcg_constant_i32((ctx->opcode & 0x200) != 0); \
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\
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gen_helper_##op(cpu_crf[6], rd, ra, rb, ps); \
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}
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@ -2594,7 +2594,7 @@ static void gen_##op(DisasContext *ctx) \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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\
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ps = tcg_const_i32((ctx->opcode & 0x200) != 0); \
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ps = tcg_constant_i32((ctx->opcode & 0x200) != 0); \
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\
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gen_helper_##op(cpu_crf[6], rd, rb, ps); \
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}
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@ -2726,7 +2726,7 @@ static void gen_##op(DisasContext *ctx) \
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} \
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ra = gen_avr_ptr(rA(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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st_six = tcg_const_i32(rB(ctx->opcode)); \
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st_six = tcg_constant_i32(rB(ctx->opcode)); \
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gen_helper_##op(rd, ra, st_six); \
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}
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