target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -183,7 +183,7 @@ static x86_def_t x86_defs[] = {
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
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.ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
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/* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
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.xlevel = 0x8000000A,
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.xlevel = 0x80000008,
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.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
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},
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#endif
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@ -198,6 +198,25 @@ static x86_def_t x86_defs[] = {
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.xlevel = 0,
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.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
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},
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{
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.name = "coreduo",
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.level = 10,
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.family = 6,
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.model = 14,
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.stepping = 8,
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/* The original CPU also implements these features:
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CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
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CPUID_TM, CPUID_PBE */
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.features = PPRO_FEATURES | CPUID_VME |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
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/* The original CPU also implements these ext features:
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CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
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CPUID_EXT_PDCM */
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
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.ext2_features = CPUID_EXT2_NX,
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.xlevel = 0x80000008,
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.model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
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},
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{
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.name = "486",
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.level = 0,
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@ -2026,7 +2026,10 @@ void helper_cpuid(void)
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#if defined(USE_KQEMU)
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EAX = 0x00000020; /* 32 bits physical */
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#else
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if (env->cpuid_features & CPUID_PSE36)
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EAX = 0x00000024; /* 36 bits physical */
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else
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EAX = 0x00000020; /* 32 bits physical */
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#endif
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}
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EBX = 0;
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