target-i386: Ensure always-1 bits on DR6 can't be cleared
Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they can't be cleared by software. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
parent
d005233923
commit
462f8ed1f1
@ -262,7 +262,7 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0)
|
||||
}
|
||||
/* fallthru */
|
||||
case 6:
|
||||
env->dr[6] = t0;
|
||||
env->dr[6] = t0 | DR6_FIXED_1;
|
||||
return;
|
||||
case 5:
|
||||
if (env->cr[4] & CR4_DE_MASK) {
|
||||
|
Loading…
Reference in New Issue
Block a user