target/i386: Use i128 for 128 and 256-bit loads and stores
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -2918,59 +2918,54 @@ static inline void gen_stq_env_A0(DisasContext *s, int offset)
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static inline void gen_ldo_env_A0(DisasContext *s, int offset, bool align)
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{
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MemOp atom = (s->cpuid_ext_features & CPUID_EXT_AVX
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? MO_ATOM_IFALIGN : MO_ATOM_IFALIGN_PAIR);
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MemOp mop = MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0);
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int mem_index = s->mem_index;
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, mem_index,
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MO_LEUQ | (align ? MO_ALIGN_16 : 0));
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(0)));
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tcg_gen_addi_tl(s->tmp0, s->A0, 8);
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(1)));
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TCGv_i128 t = tcg_temp_new_i128();
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tcg_gen_qemu_ld_i128(t, s->A0, mem_index, mop);
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tcg_gen_st_i128(t, tcg_env, offset);
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}
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static inline void gen_sto_env_A0(DisasContext *s, int offset, bool align)
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{
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MemOp atom = (s->cpuid_ext_features & CPUID_EXT_AVX
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? MO_ATOM_IFALIGN : MO_ATOM_IFALIGN_PAIR);
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MemOp mop = MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0);
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int mem_index = s->mem_index;
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(0)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, mem_index,
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MO_LEUQ | (align ? MO_ALIGN_16 : 0));
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tcg_gen_addi_tl(s->tmp0, s->A0, 8);
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(1)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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TCGv_i128 t = tcg_temp_new_i128();
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tcg_gen_ld_i128(t, tcg_env, offset);
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tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop);
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}
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static void gen_ldy_env_A0(DisasContext *s, int offset, bool align)
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{
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MemOp mop = MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR;
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int mem_index = s->mem_index;
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, mem_index,
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MO_LEUQ | (align ? MO_ALIGN_32 : 0));
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(0)));
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tcg_gen_addi_tl(s->tmp0, s->A0, 8);
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(1)));
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TCGv_i128 t0 = tcg_temp_new_i128();
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TCGv_i128 t1 = tcg_temp_new_i128();
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tcg_gen_qemu_ld_i128(t0, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0));
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tcg_gen_addi_tl(s->tmp0, s->A0, 16);
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(2)));
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tcg_gen_addi_tl(s->tmp0, s->A0, 24);
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tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(3)));
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tcg_gen_qemu_ld_i128(t1, s->tmp0, mem_index, mop);
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tcg_gen_st_i128(t0, tcg_env, offset + offsetof(YMMReg, YMM_X(0)));
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tcg_gen_st_i128(t1, tcg_env, offset + offsetof(YMMReg, YMM_X(1)));
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}
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static void gen_sty_env_A0(DisasContext *s, int offset, bool align)
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{
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MemOp mop = MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR;
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int mem_index = s->mem_index;
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(0)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, mem_index,
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MO_LEUQ | (align ? MO_ALIGN_32 : 0));
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tcg_gen_addi_tl(s->tmp0, s->A0, 8);
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(1)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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TCGv_i128 t = tcg_temp_new_i128();
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tcg_gen_ld_i128(t, tcg_env, offset + offsetof(YMMReg, YMM_X(0)));
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tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0));
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tcg_gen_addi_tl(s->tmp0, s->A0, 16);
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(2)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_addi_tl(s->tmp0, s->A0, 24);
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tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(3)));
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tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
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tcg_gen_ld_i128(t, tcg_env, offset + offsetof(YMMReg, YMM_X(1)));
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tcg_gen_qemu_st_i128(t, s->tmp0, mem_index, mop);
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}
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#include "decode-new.h"
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