tcg/s390x: Implement TCG_TARGET_HAS_mul_vec

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-09-14 18:33:47 -07:00
parent ae77bbe574
commit 479b61cbfa
2 changed files with 8 additions and 1 deletions

View File

@ -277,6 +277,7 @@ typedef enum S390Opcode {
VRRc_VCEQ = 0xe7f8, /* we leave the m5 cs field 0 */
VRRc_VCH = 0xe7fb, /* " */
VRRc_VCHL = 0xe7f9, /* " */
VRRc_VML = 0xe7a2,
VRRc_VN = 0xe768,
VRRc_VNC = 0xe769,
VRRc_VNO = 0xe76b,
@ -2696,6 +2697,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_andc_vec:
tcg_out_insn(s, VRRc, VNC, a0, a1, a2, 0);
break;
case INDEX_op_mul_vec:
tcg_out_insn(s, VRRc, VML, a0, a1, a2, vece);
break;
case INDEX_op_or_vec:
tcg_out_insn(s, VRRc, VO, a0, a1, a2, 0);
break;
@ -2745,6 +2749,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
return 1;
case INDEX_op_cmp_vec:
return -1;
case INDEX_op_mul_vec:
return vece < MO_64;
default:
return 0;
}
@ -2981,6 +2987,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_orc_vec:
case INDEX_op_xor_vec:
case INDEX_op_cmp_vec:
case INDEX_op_mul_vec:
return C_O1_I2(v, v, v);
default:

View File

@ -154,7 +154,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_shi_vec 0
#define TCG_TARGET_HAS_shs_vec 0
#define TCG_TARGET_HAS_shv_vec 0
#define TCG_TARGET_HAS_mul_vec 0
#define TCG_TARGET_HAS_mul_vec 1
#define TCG_TARGET_HAS_sat_vec 0
#define TCG_TARGET_HAS_minmax_vec 0
#define TCG_TARGET_HAS_bitsel_vec 0