ppc/40x: Allocate IRQ lines with qdev_init_gpio_in()

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220705145814.461723-3-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Cédric Le Goater 2022-07-05 16:58:11 +02:00 committed by Daniel Henrique Barboza
parent 9fd0122e7d
commit 47b60fc625
5 changed files with 12 additions and 15 deletions

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@ -422,10 +422,7 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
void ppc40x_irq_init(PowerPCCPU *cpu) void ppc40x_irq_init(PowerPCCPU *cpu)
{ {
CPUPPCState *env = &cpu->env; qdev_init_gpio_in(DEVICE(cpu), ppc40x_set_irq, PPC40x_INPUT_NB);
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
cpu, PPC40x_INPUT_NB);
} }
/* PowerPC E500 internal IRQ controller */ /* PowerPC E500 internal IRQ controller */

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@ -1470,9 +1470,9 @@ PowerPCCPU *ppc405ep_init(MemoryRegion *address_space_mem,
sysbus_realize_and_unref(uicsbd, &error_fatal); sysbus_realize_and_unref(uicsbd, &error_fatal);
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
*uicdevp = uicdev; *uicdevp = uicdev;

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@ -200,9 +200,9 @@ static void bamboo_init(MachineState *machine)
sysbus_realize_and_unref(uicsbd, &error_fatal); sysbus_realize_and_unref(uicsbd, &error_fatal);
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
/* SDRAM controller */ /* SDRAM controller */
memset(ram_bases, 0, sizeof(ram_bases)); memset(ram_bases, 0, sizeof(ram_bases));

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@ -334,9 +334,9 @@ static void sam460ex_init(MachineState *machine)
if (i == 0) { if (i == 0) {
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT, sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT, sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
} else { } else {
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT, sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(uic[0], input_ints[i])); qdev_get_gpio_in(uic[0], input_ints[i]));

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@ -111,9 +111,9 @@ static PowerPCCPU *ppc440_init_xilinx(const char *cpu_type, uint32_t sysclk)
sysbus_realize_and_unref(uicsbd, &error_fatal); sysbus_realize_and_unref(uicsbd, &error_fatal);
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]); qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
/* This board doesn't wire anything up to the inputs of the UIC. */ /* This board doesn't wire anything up to the inputs of the UIC. */
return cpu; return cpu;
@ -213,7 +213,7 @@ static void virtex_init(MachineState *machine)
CPUPPCState *env; CPUPPCState *env;
hwaddr ram_base = 0; hwaddr ram_base = 0;
DriveInfo *dinfo; DriveInfo *dinfo;
qemu_irq irq[32], *cpu_irq; qemu_irq irq[32], cpu_irq;
int kernel_size; int kernel_size;
int i; int i;
@ -236,12 +236,12 @@ static void virtex_init(MachineState *machine)
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; cpu_irq = qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT);
dev = qdev_new("xlnx.xps-intc"); dev = qdev_new("xlnx.xps-intc");
qdev_prop_set_uint32(dev, "kind-of-intr", 0); qdev_prop_set_uint32(dev, "kind-of-intr", 0);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(dev, i); irq[i] = qdev_get_gpio_in(dev, i);
} }