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target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 

Multiplication of Q15 fractional halfword vectors was incorrect in the
previous implementation of mipsdsp_rndq15_mul_q15_q15. It failed to take
element signs into account. This change fixes it, and it adds a test case
for it.

The change also removes unnecessary cast in the function
mipsdsp_mul_q15_q15_overflowflag21().

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Richard Henderson  <rth@twiddle.net> 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Petar Jovanovic 2013-05-23 19:37:53 +02:00 committed by Aurelien Jarno
parent 200a06397f
commit 4877866ee4
2 changed files with 20 additions and 3 deletions
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4
target-mips/dsp_helper.c
View File

@ -390,7 +390,7 @@ static inline int32_t mipsdsp_mul_q15_q15_overflowflag21(uint16_t a, uint16_t b,
temp = 0x7FFFFFFF;
set_DSPControl_overflow_flag(1, 21, env);
} else {
temp = ((int32_t)(int16_t)a * (int32_t)(int16_t)b) << 1;
temp = ((int16_t)a * (int16_t)b) << 1;
}
return temp;
@ -622,7 +622,7 @@ static inline int16_t mipsdsp_rndq15_mul_q15_q15(uint16_t a, uint16_t b,
temp = 0x7FFF0000;
set_DSPControl_overflow_flag(1, 21, env);
} else {
temp = (a * b) << 1;
temp = ((int16_t)a * (int16_t)b) << 1;
temp = temp + 0x00008000;
}

19
tests/tcg/mips/mips32-dsp/mulq_rs_ph.c
View File

@ -12,7 +12,24 @@ int main()
resultdsp = 1;
__asm
("mulq_rs.ph %0, %2, %3\n\t"
("wrdsp $0\n\t"
"mulq_rs.ph %0, %2, %3\n\t"
"rddsp %1\n\t"
: "=r"(rd), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 21) & 0x01;
assert(rd == result);
assert(dsp == resultdsp);
rs = 0x80011234;
rt = 0x80024321;
result = 0x7FFD098C;
resultdsp = 0;
__asm
("wrdsp $0\n\t"
"mulq_rs.ph %0, %2, %3\n\t"
"rddsp %1\n\t"
: "=r"(rd), "=r"(dsp)
: "r"(rs), "r"(rt)