target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15
Multiplication of Q15 fractional halfword vectors was incorrect in the previous implementation of mipsdsp_rndq15_mul_q15_q15. It failed to take element signs into account. This change fixes it, and it adds a test case for it. The change also removes unnecessary cast in the function mipsdsp_mul_q15_q15_overflowflag21(). Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -390,7 +390,7 @@ static inline int32_t mipsdsp_mul_q15_q15_overflowflag21(uint16_t a, uint16_t b,
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temp = 0x7FFFFFFF;
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temp = 0x7FFFFFFF;
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set_DSPControl_overflow_flag(1, 21, env);
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set_DSPControl_overflow_flag(1, 21, env);
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} else {
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} else {
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temp = ((int32_t)(int16_t)a * (int32_t)(int16_t)b) << 1;
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temp = ((int16_t)a * (int16_t)b) << 1;
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}
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}
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return temp;
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return temp;
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@ -622,7 +622,7 @@ static inline int16_t mipsdsp_rndq15_mul_q15_q15(uint16_t a, uint16_t b,
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temp = 0x7FFF0000;
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temp = 0x7FFF0000;
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set_DSPControl_overflow_flag(1, 21, env);
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set_DSPControl_overflow_flag(1, 21, env);
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} else {
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} else {
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temp = (a * b) << 1;
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temp = ((int16_t)a * (int16_t)b) << 1;
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temp = temp + 0x00008000;
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temp = temp + 0x00008000;
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}
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}
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@ -12,7 +12,24 @@ int main()
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resultdsp = 1;
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resultdsp = 1;
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__asm
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__asm
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("mulq_rs.ph %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"mulq_rs.ph %0, %2, %3\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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);
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dsp = (dsp >> 21) & 0x01;
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assert(rd == result);
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assert(dsp == resultdsp);
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rs = 0x80011234;
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rt = 0x80024321;
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result = 0x7FFD098C;
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resultdsp = 0;
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__asm
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("wrdsp $0\n\t"
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"mulq_rs.ph %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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