OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

memory: add parameter errp to memory_region_init_ram 

Add parameter errp to memory_region_init_ram and update all call sites
to pass in &error_abort.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Hu Tao 2014-09-09 13:27:55 +08:00 committed by Paolo Bonzini
parent ef701d7b6f
commit 49946538d2
75 changed files with 210 additions and 135 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
backends/hostmem-ram.c
View File

@ -27,7 +27,7 @@ ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
path = object_get_canonical_path_component(OBJECT(backend));
memory_region_init_ram(&backend->mr, OBJECT(backend), path,
backend->size);
backend->size, &error_abort);
g_free(path);
}

3
hw/alpha/typhoon.c
View File

@ -844,7 +844,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size);
memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size,
&error_abort);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);

7
hw/arm/armv7m.c
View File

@ -210,11 +210,12 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory,
#endif
/* Flash programming is done via the SCU, so pretend it is ROM. */
memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size);
memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(system_memory, 0, flash);
memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size);
memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(system_memory, 0x20000000, sram);
armv7m_bitband_init();
@ -255,7 +256,7 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory,
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000);
memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000, &error_abort);
vmstate_register_ram_global(hack);
memory_region_add_subregion(system_memory, 0xfffff000, hack);

2
hw/arm/cubieboard.c
View File

@ -64,7 +64,7 @@ static void cubieboard_init(MachineState *machine)
}
memory_region_init_ram(&s->sdram, NULL, "cubieboard.ram",
machine->ram_size);
machine->ram_size, &error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE,
&s->sdram);

2
hw/arm/digic_boards.c
View File

@ -51,7 +51,7 @@ typedef struct DigicBoard {
static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
{
memory_region_init_ram(&s->ram, NULL, "ram", ram_size);
memory_region_init_ram(&s->ram, NULL, "ram", ram_size, &error_abort);
memory_region_add_subregion(get_system_memory(), 0, &s->ram);
vmstate_register_ram_global(&s->ram);
}

9
hw/arm/exynos4210.c
View File

@ -248,7 +248,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Internal ROM */
memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom",
EXYNOS4210_IROM_SIZE);
EXYNOS4210_IROM_SIZE, &error_abort);
vmstate_register_ram_global(&s->irom_mem);
memory_region_set_readonly(&s->irom_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
@ -264,7 +264,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Internal RAM */
memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram",
EXYNOS4210_IRAM_SIZE);
EXYNOS4210_IRAM_SIZE, &error_abort);
vmstate_register_ram_global(&s->iram_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR,
&s->iram_mem);
@ -273,13 +273,14 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
mem_size = ram_size;
if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
mem_size - EXYNOS4210_DRAM_MAX_SIZE);
mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_abort);
vmstate_register_ram_global(&s->dram1_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
&s->dram1_mem);
mem_size = EXYNOS4210_DRAM_MAX_SIZE;
}
memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size);
memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
&error_abort);
vmstate_register_ram_global(&s->dram0_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
&s->dram0_mem);

5
hw/arm/highbank.c
View File

@ -255,12 +255,13 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
sysmem = get_system_memory();
dram = g_new(MemoryRegion, 1);
memory_region_init_ram(dram, NULL, "highbank.dram", ram_size);
memory_region_init_ram(dram, NULL, "highbank.dram", ram_size, &error_abort);
/* SDRAM at address zero. */
memory_region_add_subregion(sysmem, 0, dram);
sysram = g_new(MemoryRegion, 1);
memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000);
memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000,
&error_abort);
memory_region_add_subregion(sysmem, 0xfff88000, sysram);
if (bios_name != NULL) {
sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

5
hw/arm/integratorcp.c
View File

@ -264,7 +264,8 @@ static int integratorcm_init(SysBusDevice *dev)
s->cm_init = 0x00000112;
s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24,
1000);
memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000);
memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000,
&error_abort);
vmstate_register_ram_global(&s->flash);
memory_region_init_io(&s->iomem, OBJECT(s), &integratorcm_ops, s,
@ -485,7 +486,7 @@ static void integratorcp_init(MachineState *machine)
exit(1);
}
memory_region_init_ram(ram, NULL, "integrator.ram", ram_size);
memory_region_init_ram(ram, NULL, "integrator.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */

4
hw/arm/kzm.c
View File

@ -97,14 +97,14 @@ static void kzm_init(MachineState *machine)
/* On a real system, the first 16k is a `secure boot rom' */
memory_region_init_ram(ram, NULL, "kzm.ram", ram_size);
memory_region_init_ram(ram, NULL, "kzm.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, KZM_RAMADDRESS, ram);
memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size);
memory_region_add_subregion(address_space_mem, 0x88000000, ram_alias);
memory_region_init_ram(sram, NULL, "kzm.sram", 0x4000);
memory_region_init_ram(sram, NULL, "kzm.sram", 0x4000, &error_abort);
memory_region_add_subregion(address_space_mem, 0x1FFFC000, sram);
dev = sysbus_create_varargs("imx_avic", 0x68000000,

3
hw/arm/mainstone.c
View File

@ -123,7 +123,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
/* Setup CPU & memory */
mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM,
&error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

6
hw/arm/musicpal.c
View File

@ -1601,11 +1601,13 @@ static void musicpal_init(MachineState *machine)
}
/* For now we use a fixed - the original - RAM size */
memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE);
memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);

6
hw/arm/omap1.c
View File

@ -3854,10 +3854,12 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size);
memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size,
&error_abort);
vmstate_register_ram_global(&s->emiff_ram);
memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);
memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size);
memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size,
&error_abort);
vmstate_register_ram_global(&s->imif_ram);
memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);

6
hw/arm/omap2.c
View File

@ -2266,10 +2266,12 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size);
memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size,
&error_abort);
vmstate_register_ram_global(&s->sram);
memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram);

6
hw/arm/omap_sx1.c
View File

@ -122,7 +122,8 @@ static void sx1_init(MachineState *machine, const int version)
machine->cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
@ -164,7 +165,8 @@ static void sx1_init(MachineState *machine, const int version)
if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size);
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size,
&error_abort);
vmstate_register_ram_global(flash_1);
memory_region_set_readonly(flash_1, true);
memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);

3
hw/arm/palm.c
View File

@ -212,7 +212,8 @@ static void palmte_init(MachineState *machine)
mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size);
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash);

11
hw/arm/pxa2xx.c
View File

@ -2055,10 +2055,12 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000);
memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000,
&error_abort);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);
@ -2186,11 +2188,12 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
PXA2XX_INTERNAL_SIZE);
PXA2XX_INTERNAL_SIZE, &error_abort);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);

9
hw/arm/realview.c
View File

@ -137,12 +137,14 @@ static void realview_init(MachineState *machine,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size);
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
&error_abort);
vmstate_register_ram_global(ram_lo);
memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size);
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram_hi);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
@ -337,7 +339,8 @@ static void realview_init(MachineState *machine,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000);
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
&error_abort);
vmstate_register_ram_global(ram_hack);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);

2
hw/arm/spitz.c
View File

@ -912,7 +912,7 @@ static void spitz_common_init(MachineState *machine,
sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/arm/strongarm.c
View File

@ -1604,7 +1604,8 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
exit(1);
}
memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);

2
hw/arm/tosa.c
View File

@ -228,7 +228,7 @@ static void tosa_init(MachineState *machine)
mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/arm/versatilepb.c
View File

@ -198,7 +198,8 @@ static void versatile_init(MachineState *machine, int board_id)
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size);
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */

15
hw/arm/vexpress.c
View File

@ -252,7 +252,8 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
exit(1);
}
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
low_ram_size = ram_size;
if (low_ram_size > 0x4000000) {
@ -346,7 +347,8 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
}
}
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
/* RAM is from 0x80000000 upwards; there is no low-memory alias for it. */
memory_region_add_subregion(sysmem, 0x80000000, ram);
@ -364,7 +366,8 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
/* 0x2b060000: SP805 watchdog: not modelled */
/* 0x2b0a0000: PL341 dynamic memory controller: not modelled */
/* 0x2e000000: system SRAM */
memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000);
memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0x2e000000, sram);
@ -634,12 +637,14 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
}
sram_size = 0x2000000;
memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size);
memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, map[VE_SRAM], sram);
vram_size = 0x800000;
memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size);
memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size,
&error_abort);
vmstate_register_ram_global(vram);
memory_region_add_subregion(sysmem, map[VE_VIDEORAM], vram);

3
hw/arm/virt.c
View File

@ -510,7 +510,8 @@ static void machvirt_init(MachineState *machine)
fdt_add_cpu_nodes(vbi);
fdt_add_psci_node(vbi);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);

6
hw/arm/xilinx_zynq.c
View File

@ -149,12 +149,14 @@ static void zynq_init(MachineState *machine)
}
/* DDR remapped to address zero. */
memory_region_init_ram(ext_ram, NULL, "zynq.ext_ram", ram_size);
memory_region_init_ram(ext_ram, NULL, "zynq.ext_ram", ram_size,
&error_abort);
vmstate_register_ram_global(ext_ram);
memory_region_add_subregion(address_space_mem, 0, ext_ram);
/* 256K of on-chip memory */
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10);
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10,
&error_abort);
vmstate_register_ram_global(ocm_ram);
memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram);

2
hw/block/onenand.c
View File

@ -789,7 +789,7 @@ static int onenand_initfn(SysBusDevice *sbd)
s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram",
0xc000 << s->shift);
0xc000 << s->shift, &error_abort);
vmstate_register_ram_global(&s->ram);
ram = memory_region_get_ram_ptr(&s->ram);
s->boot[0] = ram + (0x0000 << s->shift);

2
hw/core/loader.c
View File

@ -680,7 +680,7 @@ static void *rom_set_mr(Rom *rom, Object *owner, const char *name)
void *data;
rom->mr = g_malloc(sizeof(*rom->mr));
memory_region_init_ram(rom->mr, owner, name, rom->datasize);
memory_region_init_ram(rom->mr, owner, name, rom->datasize, &error_abort);
memory_region_set_readonly(rom->mr, true);
vmstate_register_ram_global(rom->mr);

6
hw/cris/axis_dev88.c
View File

@ -270,13 +270,15 @@ void axisdev88_init(MachineState *machine)
env = &cpu->env;
/* allocate RAM */
memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE);
memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE,
&error_abort);
vmstate_register_ram_global(phys_intmem);
memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem);

6
hw/display/cg3.c
View File

@ -279,7 +279,8 @@ static void cg3_initfn(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
CG3State *s = CG3(obj);
memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE,
&error_abort);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(sbd, &s->rom);
@ -306,7 +307,8 @@ static void cg3_realizefn(DeviceState *dev, Error **errp)
}
}
memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size);
memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size,
&error_abort);
vmstate_register_ram_global(&s->vram_mem);
sysbus_init_mmio(sbd, &s->vram_mem);

6
hw/display/qxl.c
View File

@ -1979,14 +1979,14 @@ static int qxl_init_common(PCIQXLDevice *qxl)
qxl->rom_size = qxl_rom_size();
memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
qxl->rom_size);
qxl->rom_size, &error_abort);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
qxl->vram_size);
qxl->vram_size, &error_abort);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
&qxl->vram_bar, 0, qxl->vram32_size);
@ -2095,7 +2095,7 @@ static int qxl_init_secondary(PCIDevice *dev)
qxl->id = device_id++;
qxl_init_ramsize(qxl);
memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
qxl->vga.vram_size);
qxl->vga.vram_size, &error_abort);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl);

2
hw/display/sm501.c
View File

@ -1410,7 +1410,7 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
/* allocate local memory */
memory_region_init_ram(&s->local_mem_region, NULL, "sm501.local",
local_mem_bytes);
local_mem_bytes, &error_abort);
vmstate_register_ram_global(&s->local_mem_region);
s->local_mem = memory_region_get_ram_ptr(&s->local_mem_region);
memory_region_add_subregion(address_space_mem, base, &s->local_mem_region);

3
hw/display/tc6393xb.c
View File

@ -581,7 +581,8 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000);
memory_region_add_subregion(sysmem, base, &s->iomem);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000,
&error_abort);
vmstate_register_ram_global(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);

5
hw/display/tcx.c
View File

@ -535,7 +535,8 @@ static void tcx_initfn(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
TCXState *s = TCX(obj);
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE,
&error_abort);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(sbd, &s->rom);
@ -567,7 +568,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp)
char *fcode_filename;
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
s->vram_size * (1 + 4 + 4), &error_abort);
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);

3
hw/display/vga.c
View File

@ -2326,7 +2326,8 @@ void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate)
}
s->is_vbe_vmstate = 1;
memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size);
memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size,
&error_abort);
vmstate_register_ram(&s->vram, global_vmstate ? NULL : DEVICE(obj));
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);

3
hw/display/vmware_vga.c
View File

@ -1201,7 +1201,8 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s);
s->fifo_size = SVGA_FIFO_SIZE;
memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size);
memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size,
&error_abort);
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);

3
hw/i386/kvm/pci-assign.c
View File

@ -1936,7 +1936,8 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev)
snprintf(name, sizeof(name), "%s.rom",
object_get_typename(OBJECT(dev)));
memory_region_init_ram(&dev->dev.rom, OBJECT(dev), name, st.st_size);
memory_region_init_ram(&dev->dev.rom, OBJECT(dev), name, st.st_size,
&error_abort);
vmstate_register_ram(&dev->dev.rom, &dev->dev.qdev);
ptr = memory_region_get_ram_ptr(&dev->dev.rom);
memset(ptr, 0xff, st.st_size);

3
hw/i386/pc.c
View File

@ -1273,7 +1273,8 @@ FWCfgState *pc_memory_init(MachineState *machine,
pc_system_firmware_init(rom_memory, guest_info->isapc_ram_fw);
option_rom_mr = g_malloc(sizeof(*option_rom_mr));
memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE);
memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
&error_abort);
vmstate_register_ram_global(option_rom_mr);
memory_region_add_subregion_overlap(rom_memory,
PC_ROM_MIN_VGA,

5
hw/i386/pc_sysfw.c
View File

@ -55,7 +55,8 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = MIN(flash_size, 128 * 1024);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size);
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size,
&error_abort);
vmstate_register_ram_global(isa_bios);
memory_region_add_subregion_overlap(rom_memory,
0x100000 - isa_bios_size,
@ -192,7 +193,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
goto bios_error;
}
bios = g_malloc(sizeof(*bios));
memory_region_init_ram(bios, NULL, "pc.bios", bios_size);
memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_abort);
vmstate_register_ram_global(bios);
if (!isapc_ram_fw) {
memory_region_set_readonly(bios, true);

4
hw/input/milkymist-softusb.c
View File

@ -250,12 +250,12 @@ static int milkymist_softusb_init(SysBusDevice *dev)
/* register pmem and dmem */
memory_region_init_ram(&s->pmem, OBJECT(s), "milkymist-softusb.pmem",
s->pmem_size);
s->pmem_size, &error_abort);
vmstate_register_ram_global(&s->pmem);
s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem);
sysbus_init_mmio(dev, &s->pmem);
memory_region_init_ram(&s->dmem, OBJECT(s), "milkymist-softusb.dmem",
s->dmem_size);
s->dmem_size, &error_abort);
vmstate_register_ram_global(&s->dmem);
s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem);
sysbus_init_mmio(dev, &s->dmem);

6
hw/lm32/lm32_boards.c
View File

@ -111,7 +111,8 @@ static void lm32_evr_init(MachineState *machine)
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size);
memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
@ -213,7 +214,8 @@ static void lm32_uclinux_init(MachineState *machine)
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size);
memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);

3
hw/lm32/milkymist.c
View File

@ -118,7 +118,8 @@ milkymist_init(MachineState *machine)
cpu_lm32_set_phys_msb_ignore(env, 1);
memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size);
memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(phys_sdram);
memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram);

4
hw/m68k/an5206.c
View File

@ -50,12 +50,12 @@ static void an5206_init(MachineState *machine)
env->rambar0 = AN5206_RAMBAR_ADDR | 1;
/* DRAM at address zero */
memory_region_init_ram(ram, NULL, "an5206.ram", ram_size);
memory_region_init_ram(ram, NULL, "an5206.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "an5206.sram", 512);
memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);

2
hw/m68k/dummy_m68k.c
View File

@ -40,7 +40,7 @@ static void dummy_m68k_init(MachineState *machine)
env->vbr = 0;
/* RAM at address zero */
memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size);
memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);

4
hw/m68k/mcf5208.c
View File

@ -218,12 +218,12 @@ static void mcf5208evb_init(MachineState *machine)
/* TODO: Configure BARs. */
/* DRAM at 0x40000000 */
memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size);
memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384);
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);

5
hw/microblaze/petalogix_ml605_mmu.c
View File

@ -99,11 +99,12 @@ petalogix_ml605_init(MachineState *machine)
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
LMB_BRAM_SIZE);
LMB_BRAM_SIZE, &error_abort);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram);

6
hw/microblaze/petalogix_s3adsp1800_mmu.c
View File

@ -81,11 +81,13 @@ petalogix_s3adsp1800_init(MachineState *machine)
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL,
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE);
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
&error_abort);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
ram_size, &error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(sysmem, ddr_base, phys_ram);

5
hw/mips/mips_fulong2e.c
View File

@ -302,9 +302,10 @@ static void mips_fulong2e_init(MachineState *machine)
bios_size = 1024 * 1024;
/* allocate RAM */
memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size);
memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);

8
hw/mips/mips_jazz.c
View File

@ -179,11 +179,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
cc->do_unassigned_access = mips_jazz_do_unassigned_access;
/* allocate RAM */
memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, 0, ram);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios,
@ -244,7 +245,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
{
/* Simple ROM, so user doesn't have to provide one */
MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000,
&error_abort);
vmstate_register_ram_global(rom_mr);
memory_region_set_readonly(rom_mr, true);
uint8_t *rom = memory_region_get_ram_ptr(rom_mr);

6
hw/mips/mips_malta.c
View File

@ -992,7 +992,8 @@ void mips_malta_init(MachineState *machine)
}
/* register RAM at high address where it is undisturbed by IO */
memory_region_init_ram(ram_high, NULL, "mips_malta.ram", ram_size);
memory_region_init_ram(ram_high, NULL, "mips_malta.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram_high);
memory_region_add_subregion(system_memory, 0x80000000, ram_high);
@ -1116,7 +1117,8 @@ void mips_malta_init(MachineState *machine)
* handled by an overlapping region as the resulting ROM code subpage
* regions are not executable.
*/
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE);
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE,
&error_abort);
if (!rom_copy(memory_region_get_ram_ptr(bios_copy),
FLASH_ADDRESS, BIOS_SIZE)) {
memcpy(memory_region_get_ram_ptr(bios_copy),

6
hw/mips/mips_mipssim.c
View File

@ -171,9 +171,11 @@ mips_mipssim_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);

5
hw/mips/mips_r4k.c
View File

@ -204,7 +204,7 @@ void mips_r4k_init(MachineState *machine)
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
@ -231,7 +231,8 @@ void mips_r4k_init(MachineState *machine)
#endif
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);

4
hw/moxie/moxiesim.c
View File

@ -123,11 +123,11 @@ static void moxiesim_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, cpu);
/* Allocate RAM. */
memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size);
memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, ram_base, ram);
memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000);
memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0x1000, rom);

2
hw/net/milkymist-minimac2.c
View File

@ -472,7 +472,7 @@ static int milkymist_minimac2_init(SysBusDevice *sbd)
/* register buffers memory */
memory_region_init_ram(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers",
buffers_size);
buffers_size, &error_abort);
vmstate_register_ram_global(&s->buffers);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE;

2
hw/openrisc/openrisc_sim.c
View File

@ -114,7 +114,7 @@ static void openrisc_sim_init(MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size);
memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);

3
hw/pci-host/prep.c
View File

@ -299,7 +299,8 @@ static int raven_init(PCIDevice *d)
d->config[0x0D] = 0x10; // latency_timer
d->config[0x34] = 0x00; // capabilities_pointer
memory_region_init_ram(&s->bios, OBJECT(s), "bios", BIOS_SIZE);
memory_region_init_ram(&s->bios, OBJECT(s), "bios", BIOS_SIZE,
&error_abort);
memory_region_set_readonly(&s->bios, true);
memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE),
&s->bios);

2
hw/pci/pci.c
View File

@ -1974,7 +1974,7 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom)
snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev)));
}
pdev->has_rom = true;
memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size);
memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size, &error_abort);
vmstate_register_ram(&pdev->rom, &pdev->qdev);
ptr = memory_region_get_ram_ptr(&pdev->rom);
load_image(path, ptr);

3
hw/ppc/mac_newworld.c
View File

@ -204,7 +204,8 @@ static void ppc_core99_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)

3
hw/ppc/mac_oldworld.c
View File

@ -135,7 +135,8 @@ static void ppc_heathrow_init(MachineState *machine)
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)

8
hw/ppc/ppc405_boards.c
View File

@ -214,7 +214,7 @@ static void ref405ep_init(MachineState *machine)
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size);
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
@ -246,7 +246,8 @@ static void ref405ep_init(MachineState *machine)
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
@ -572,7 +573,8 @@ static void taihu_405ep_init(MachineState *machine)
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {

3
hw/ppc/ppc405_uc.c
View File

@ -974,7 +974,8 @@ static void ppc405_ocm_init(CPUPPCState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096);
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096,
&error_abort);
vmstate_register_ram_global(&ocm->isarc_ram);
memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
0, 4096);

2
hw/s390x/s390-virtio-ccw.c
View File

@ -131,7 +131,7 @@ static void ccw_init(MachineState *machine)
virtio_ccw_register_hcalls();
/* allocate RAM for core */
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);

2
hw/s390x/s390-virtio.c
View File

@ -260,7 +260,7 @@ static void s390_init(MachineState *machine)
s390_virtio_register_hcalls();
/* allocate RAM */
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);

2
hw/s390x/sclp.c
View File

@ -239,7 +239,7 @@ static void assign_storage(SCCB *sccb)
this_subregion_size = mhd->standby_subregion_size;
}
memory_region_init_ram(standby_ram, NULL, id, this_subregion_size);
memory_region_init_ram(standby_ram, NULL, id, this_subregion_size, &error_abort);
vmstate_register_ram_global(standby_ram);
memory_region_add_subregion(sysmem, offset, standby_ram);
}

2
hw/sh4/r2d.c
View File

@ -255,7 +255,7 @@ static void r2d_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate memory space */
memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_abort);
vmstate_register_ram_global(sdram);
memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
/* Register peripherals */

8
hw/sh4/shix.c
View File

@ -59,14 +59,16 @@ static void shix_init(MachineState *machine)
}
/* Allocate memory space */
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(sysmem, 0x00000000, rom);
memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
&error_abort);
vmstate_register_ram_global(&sdram[0]);
memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
&error_abort);
vmstate_register_ram_global(&sdram[1]);
memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);

4
hw/sparc/leon3.c
View File

@ -151,13 +151,13 @@ static void leon3_generic_hw_init(MachineState *machine)
exit(1);
}
memory_region_init_ram(ram, NULL, "leon3.ram", ram_size);
memory_region_init_ram(ram, NULL, "leon3.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
prom_size = 8 * 1024 * 1024; /* 8Mb */
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size);
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_abort);
vmstate_register_ram_global(prom);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);

10
hw/sparc/sun4m.c
View File

@ -621,7 +621,7 @@ static int idreg_init1(SysBusDevice *dev)
IDRegState *s = MACIO_ID_REGISTER(dev);
memory_region_init_ram(&s->mem, OBJECT(s),
"sun4m.idreg", sizeof(idreg_data));
"sun4m.idreg", sizeof(idreg_data), &error_abort);
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
@ -668,7 +668,7 @@ static int afx_init1(SysBusDevice *dev)
{
AFXState *s = TCX_AFX(dev);
memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4);
memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4, &error_abort);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
return 0;
@ -742,7 +742,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = OPENPROM(dev);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX,
&error_abort);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@ -784,7 +785,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = SUN4M_RAM(dev);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4m.ram", d->size);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4m.ram", d->size,
&error_abort);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;

6
hw/sparc64/sun4u.c
View File

@ -686,7 +686,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = OPENPROM(dev);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4u.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4u.prom", PROM_SIZE_MAX,
&error_abort);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@ -729,7 +730,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = SUN4U_RAM(dev);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size,
&error_abort);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;

12
hw/tricore/tricore_testboard.c
View File

@ -76,17 +76,17 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
error_report("Unable to find CPU definition");
exit(1);
}
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024);
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024, &error_abort);
vmstate_register_ram_global(ext_cram);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024, &error_abort);
vmstate_register_ram_global(ext_dram);
memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024);
memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024, &error_abort);
vmstate_register_ram_global(int_cram);
memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024);
memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024, &error_abort);
vmstate_register_ram_global(int_dram);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024, &error_abort);
vmstate_register_ram_global(pcp_data);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024, &error_abort);
vmstate_register_ram_global(pcp_text);
memory_region_add_subregion(sysmem, 0x80000000, ext_cram);

3
hw/unicore32/puv3.c
View File

@ -74,7 +74,8 @@ static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size)
MemoryRegion *ram_memory = g_new(MemoryRegion, 1);
/* SDRAM at address zero. */
memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size);
memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram_memory);
memory_region_add_subregion(get_system_memory(), 0, ram_memory);
}

4
hw/xtensa/sim.c
View File

@ -79,12 +79,12 @@ static void xtensa_sim_init(MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size);
memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000);
memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);

8
hw/xtensa/xtfpga.c
View File

@ -143,7 +143,7 @@ static void lx60_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384);
memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
}
@ -205,7 +205,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size);
memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
@ -254,7 +255,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,
&error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(system_memory, 0xfe000000, rom);

4
include/exec/memory.h
View File

@ -311,11 +311,13 @@ void memory_region_init_io(MemoryRegion *mr,
* @owner: the object that tracks the region's reference count
* @name: the name of the region.
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
*/
void memory_region_init_ram(MemoryRegion *mr,
struct Object *owner,
const char *name,
uint64_t size);
uint64_t size,
Error **errp);
#ifdef __linux__
/**

5
memory.c
View File

@ -1142,13 +1142,14 @@ void memory_region_init_io(MemoryRegion *mr,
void memory_region_init_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size)
uint64_t size,
Error **errp)
{
memory_region_init(mr, owner, name, size);
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram;
mr->ram_addr = qemu_ram_alloc(size, mr, &error_abort);
mr->ram_addr = qemu_ram_alloc(size, mr, errp);
}
#ifdef __linux__

4
numa.c
View File

@ -263,14 +263,14 @@ static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
if (err) {
qerror_report_err(err);
error_free(err);
memory_region_init_ram(mr, owner, name, ram_size);
memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
}
#else
fprintf(stderr, "-mem-path not supported on this host\n");
exit(1);
#endif
} else {
memory_region_init_ram(mr, owner, name, ram_size);
memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
}
vmstate_register_ram_global(mr);
}

3
xen-hvm.c
View File

@ -188,7 +188,8 @@ static void xen_ram_init(ram_addr_t *below_4g_mem_size,
*/
block_len = (1ULL << 32) + *above_4g_mem_size;
}
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len);
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
&error_abort);
*ram_memory_p = &ram_memory;
vmstate_register_ram_global(&ram_memory);