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hw/arm: Inline sysbus_create_simple(PL110 / PL111) 

We want to set another qdev property (a link) for the pl110
and pl111 devices, we can not use sysbus_create_simple() which
only passes sysbus base address and IRQs as arguments. Inline
it so we can set the link property in the next commit.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240226173805.289-2-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-02-16 16:06:05 +01:00
parent 03d496a992
commit 49aff03e1b
4 changed files with 21 additions and 5 deletions
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5
hw/arm/integratorcp.c
View File

@ -670,7 +670,10 @@ static void integratorcp_init(MachineState *machine)
smc91c111_init(0xc8000000, pic[27]);
}
sysbus_create_simple("pl110", 0xc0000000, pic[22]);
dev = qdev_new("pl110");
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xc0000000);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[22]);
integrator_binfo.ram_size = ram_size;
arm_load_kernel(cpu, machine, &integrator_binfo);

5
hw/arm/realview.c
View File

@ -238,7 +238,10 @@ static void realview_init(MachineState *machine,
sysbus_create_simple("pl061", 0x10014000, pic[7]);
gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
sysbus_create_simple("pl111", 0x10020000, pic[23]);
dev = qdev_new("pl111");
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10020000);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[23]);
dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
/* Wire up MMC card detect and read-only signals. These have

6
hw/arm/versatilepb.c
View File

@ -299,7 +299,11 @@ static void versatile_init(MachineState *machine, int board_id)
/* The versatile/PB actually has a modified Color LCD controller
that includes hardware cursor support from the PL111. */
dev = sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]);
dev = qdev_new("pl110_versatile");
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10120000);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[16]);
/* Wire up the mux control signals from the SYS_CLCD register */
qdev_connect_gpio_out(sysctl, 0, qdev_get_gpio_in(dev, 0));

10
hw/arm/vexpress.c
View File

@ -276,6 +276,7 @@ static void a9_daughterboard_init(VexpressMachineState *vms,
{
MachineState *machine = MACHINE(vms);
MemoryRegion *sysmem = get_system_memory();
DeviceState *dev;
if (ram_size > 0x40000000) {
/* 1GB is the maximum the address space permits */
@ -297,7 +298,9 @@ static void a9_daughterboard_init(VexpressMachineState *vms,
/* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
/* 0x10020000 PL111 CLCD (daughterboard) */
sysbus_create_simple("pl111", 0x10020000, pic[44]);
dev = qdev_new("pl111");
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10020000);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[44]);
/* 0x10060000 AXI RAM */
/* 0x100e0000 PL341 Dynamic Memory Controller */
@ -650,7 +653,10 @@ static void vexpress_common_init(MachineState *machine)
/* VE_COMPACTFLASH: not modelled */
sysbus_create_simple("pl111", map[VE_CLCD], pic[14]);
dev = qdev_new("pl111");
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, map[VE_CLCD]);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[14]);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash0 = ve_pflash_cfi01_register(map[VE_NORFLASH0], "vexpress.flash0",