vga: make vram size configurable
Zap the global VGA_RAM_SIZE #define, make the vga ram size configurable for standard vga and vmware vga. cirrus and qxl are left with a fixed size (and private VGA_RAM_SIZE #define) for now. qxl needs some non-trivial adjustments in the mode list handling deal with a runtime-configurable size, which calls for a separate qxl patch. cirrus emulates cards which have 2 MB (isa) and 4 MB (pci), so I guess it would make sense to use these sizes. That change would break migration though, so I left it fixed at 8 MB size. Making it configurabls is pretty pointless for cirrus as we have to match real hardware. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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4a1e244eb6
@ -43,6 +43,8 @@
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//#define DEBUG_CIRRUS
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//#define DEBUG_BITBLT
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#define VGA_RAM_SIZE (8192 * 1024)
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/***************************************
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*
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* definitions
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@ -2891,7 +2893,8 @@ static int vga_initfn(ISADevice *dev)
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ISACirrusVGAState *d = DO_UPCAST(ISACirrusVGAState, dev, dev);
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VGACommonState *s = &d->cirrus_vga.vga;
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vga_common_init(s, VGA_RAM_SIZE);
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s->vram_size_mb = VGA_RAM_SIZE >> 20;
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vga_common_init(s);
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cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
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isa_address_space(dev));
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s->ds = graphic_console_init(s->update, s->invalidate,
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@ -2933,7 +2936,8 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
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int16_t device_id = pc->device_id;
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/* setup VGA */
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vga_common_init(&s->vga, VGA_RAM_SIZE);
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s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
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vga_common_init(&s->vga);
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cirrus_init_common(s, device_id, 1, pci_address_space(dev));
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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s->vga.screen_dump, s->vga.text_update,
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5
hw/qxl.c
5
hw/qxl.c
@ -27,6 +27,8 @@
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#include "qxl.h"
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#define VGA_RAM_SIZE (8192 * 1024)
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/*
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* NOTE: SPICE_RING_PROD_ITEM accesses memory on the pci bar and as
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* such can be changed by the guest, so to avoid a guest trigerrable
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@ -1854,7 +1856,8 @@ static int qxl_init_primary(PCIDevice *dev)
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qxl->id = 0;
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qxl_init_ramsize(qxl, 32);
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vga_common_init(vga, qxl->vga.vram_size);
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vga->vram_size_mb = qxl->vga.vram_size >> 20;
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vga_common_init(vga);
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vga_init(vga, pci_address_space(dev), pci_address_space_io(dev), false);
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portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
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portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);
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@ -28,6 +28,8 @@
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#include "pixel_ops.h"
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#include "qemu-timer.h"
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#define VGA_RAM_SIZE (8192 * 1024)
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typedef struct ISAVGAMMState {
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VGACommonState vga;
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int it_shift;
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@ -128,7 +130,8 @@ int isa_vga_mm_init(target_phys_addr_t vram_base,
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s = g_malloc0(sizeof(*s));
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vga_common_init(&s->vga, VGA_RAM_SIZE);
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s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
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vga_common_init(&s->vga);
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vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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@ -49,7 +49,7 @@ static int vga_initfn(ISADevice *dev)
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MemoryRegion *vga_io_memory;
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const MemoryRegionPortio *vga_ports, *vbe_ports;
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vga_common_init(s, VGA_RAM_SIZE);
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vga_common_init(s);
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s->legacy_address_space = isa_address_space(dev);
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vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
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isa_register_portio_list(dev, 0x3b0, vga_ports, s, "vga");
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@ -69,6 +69,11 @@ static int vga_initfn(ISADevice *dev)
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return 0;
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}
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static Property vga_isa_properties[] = {
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DEFINE_PROP_UINT32("vgamem_mb", ISAVGAState, state.vram_size_mb, 8),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void vga_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -76,6 +81,7 @@ static void vga_class_initfn(ObjectClass *klass, void *data)
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ic->init = vga_initfn;
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dc->reset = vga_reset_isa;
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dc->vmsd = &vmstate_vga_common;
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dc->props = vga_isa_properties;
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}
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static TypeInfo vga_info = {
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@ -53,7 +53,7 @@ static int pci_vga_initfn(PCIDevice *dev)
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VGACommonState *s = &d->vga;
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// vga + console init
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vga_common_init(s, VGA_RAM_SIZE);
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vga_common_init(s);
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vga_init(s, pci_address_space(dev), pci_address_space_io(dev), true);
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s->ds = graphic_console_init(s->update, s->invalidate,
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@ -75,6 +75,11 @@ DeviceState *pci_vga_init(PCIBus *bus)
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return &pci_create_simple(bus, -1, "VGA")->qdev;
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}
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static Property vga_pci_properties[] = {
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DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 8),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void vga_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -87,6 +92,7 @@ static void vga_class_init(ObjectClass *klass, void *data)
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k->device_id = PCI_DEVICE_ID_QEMU_VGA;
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k->class_id = PCI_CLASS_DISPLAY_VGA;
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dc->vmsd = &vmstate_vga_pci;
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dc->props = vga_pci_properties;
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}
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static TypeInfo vga_info = {
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13
hw/vga.c
13
hw/vga.c
@ -2225,7 +2225,7 @@ const VMStateDescription vmstate_vga_common = {
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}
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};
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void vga_common_init(VGACommonState *s, int vga_ram_size)
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void vga_common_init(VGACommonState *s)
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{
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int i, j, v, b;
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@ -2252,16 +2252,23 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
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expand4to8[i] = v;
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}
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/* valid range: 1 MB -> 256 MB */
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s->vram_size = 1024 * 1024;
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while (s->vram_size < (s->vram_size_mb << 20) &&
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s->vram_size < (256 << 20)) {
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s->vram_size <<= 1;
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}
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s->vram_size_mb = s->vram_size >> 20;
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#ifdef CONFIG_BOCHS_VBE
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s->is_vbe_vmstate = 1;
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#else
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s->is_vbe_vmstate = 0;
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#endif
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memory_region_init_ram(&s->vram, "vga.vram", vga_ram_size);
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memory_region_init_ram(&s->vram, "vga.vram", s->vram_size);
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vmstate_register_ram_global(&s->vram);
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xen_register_framebuffer(&s->vram);
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s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
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s->vram_size = vga_ram_size;
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s->get_bpp = vga_get_bpp;
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s->get_offsets = vga_get_offsets;
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s->get_resolution = vga_get_resolution;
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@ -107,6 +107,7 @@ typedef struct VGACommonState {
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MemoryRegion vram;
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MemoryRegion vram_vbe;
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uint32_t vram_size;
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uint32_t vram_size_mb; /* property */
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uint32_t latch;
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MemoryRegion *chain4_alias;
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uint8_t sr_index;
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@ -184,7 +185,7 @@ static inline int c6_to_8(int v)
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return (v << 2) | (b << 1) | b;
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}
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void vga_common_init(VGACommonState *s, int vga_ram_size);
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void vga_common_init(VGACommonState *s);
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void vga_init(VGACommonState *s, MemoryRegion *address_space,
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MemoryRegion *address_space_io, bool init_vga_ports);
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MemoryRegion *vga_init_io(VGACommonState *s,
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@ -209,7 +210,6 @@ void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
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extern const uint8_t sr_mask[8];
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extern const uint8_t gr_mask[16];
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#define VGA_RAM_SIZE (8192 * 1024)
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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@ -1078,7 +1078,7 @@ static const VMStateDescription vmstate_vmware_vga = {
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}
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};
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static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size,
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static void vmsvga_init(struct vmsvga_state_s *s,
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MemoryRegion *address_space, MemoryRegion *io)
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{
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s->scratch_size = SVGA_SCRATCH_SIZE;
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@ -1095,7 +1095,7 @@ static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size,
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vmstate_register_ram_global(&s->fifo_ram);
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s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
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vga_common_init(&s->vga, vga_ram_size);
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vga_common_init(&s->vga);
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vga_init(&s->vga, address_space, io, true);
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vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
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@ -1184,7 +1184,7 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
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"vmsvga-io", 0x10);
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pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
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vmsvga_init(&s->chip, VGA_RAM_SIZE, pci_address_space(dev),
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vmsvga_init(&s->chip, pci_address_space(dev),
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pci_address_space_io(dev));
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pci_register_bar(&s->card, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, iomem);
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@ -1199,6 +1199,12 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
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return 0;
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}
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static Property vga_vmware_properties[] = {
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DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s,
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chip.vga.vram_size_mb, 8),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void vmsvga_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -1214,6 +1220,7 @@ static void vmsvga_class_init(ObjectClass *klass, void *data)
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k->subsystem_id = SVGA_PCI_DEVICE_ID;
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dc->reset = vmsvga_reset;
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dc->vmsd = &vmstate_vmware_vga;
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dc->props = vga_vmware_properties;
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}
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static TypeInfo vmsvga_info = {
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