tests/tcg/xtensa: fix vectors and checks in timer test
Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
parent
da60ecd6d8
commit
4be4c5b826
|
@ -38,6 +38,28 @@ test_end
|
||||||
|
|
||||||
#if XCHAL_NUM_TIMERS
|
#if XCHAL_NUM_TIMERS
|
||||||
|
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
|
||||||
|
#define TIMER0_VECTOR kernel
|
||||||
|
#else
|
||||||
|
#define TIMER0_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if XCHAL_NUM_TIMERS > 1
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
|
||||||
|
#define TIMER1_VECTOR kernel
|
||||||
|
#else
|
||||||
|
#define TIMER1_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if XCHAL_NUM_TIMERS > 2
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
|
||||||
|
#define TIMER2_VECTOR kernel
|
||||||
|
#else
|
||||||
|
#define TIMER2_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
test ccount_update_deadline
|
test ccount_update_deadline
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
|
@ -90,9 +112,8 @@ test ccompare
|
||||||
assert nei, a5, 0
|
assert nei, a5, 0
|
||||||
test_end
|
test_end
|
||||||
|
|
||||||
#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
|
|
||||||
test ccompare0_interrupt
|
test ccompare0_interrupt
|
||||||
set_vector kernel, 2f
|
set_vector TIMER0_VECTOR, 2f
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
rsr a2, interrupt
|
rsr a2, interrupt
|
||||||
|
@ -120,15 +141,16 @@ test ccompare0_interrupt
|
||||||
bnez a3, 1b
|
bnez a3, 1b
|
||||||
test_fail
|
test_fail
|
||||||
2:
|
2:
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
|
||||||
rsr a2, exccause
|
rsr a2, exccause
|
||||||
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
||||||
test_end
|
|
||||||
#endif
|
#endif
|
||||||
|
test_end
|
||||||
|
|
||||||
#if XCHAL_NUM_TIMERS > 1
|
#if XCHAL_NUM_TIMERS > 1
|
||||||
|
|
||||||
test ccompare1_interrupt
|
test ccompare1_interrupt
|
||||||
set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT)), 2f
|
set_vector TIMER1_VECTOR, 2f
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
rsr a2, interrupt
|
rsr a2, interrupt
|
||||||
|
@ -153,13 +175,17 @@ test ccompare1_interrupt
|
||||||
bnez a3, 1b
|
bnez a3, 1b
|
||||||
test_fail
|
test_fail
|
||||||
2:
|
2:
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
|
||||||
|
rsr a2, exccause
|
||||||
|
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
||||||
|
#endif
|
||||||
test_end
|
test_end
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
#if XCHAL_NUM_TIMERS > 2
|
#if XCHAL_NUM_TIMERS > 2
|
||||||
|
|
||||||
test ccompare2_interrupt
|
test ccompare2_interrupt
|
||||||
set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT)), 2f
|
set_vector TIMER2_VECTOR, 2f
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
rsr a2, interrupt
|
rsr a2, interrupt
|
||||||
|
@ -182,12 +208,16 @@ test ccompare2_interrupt
|
||||||
bnez a3, 1b
|
bnez a3, 1b
|
||||||
test_fail
|
test_fail
|
||||||
2:
|
2:
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
|
||||||
|
rsr a2, exccause
|
||||||
|
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
||||||
|
#endif
|
||||||
test_end
|
test_end
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
test ccompare_interrupt_masked
|
test ccompare_interrupt_masked
|
||||||
set_vector kernel, 2f
|
set_vector TIMER0_VECTOR, 2f
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
rsr a2, interrupt
|
rsr a2, interrupt
|
||||||
|
@ -217,12 +247,14 @@ test ccompare_interrupt_masked
|
||||||
|
|
||||||
test_fail
|
test_fail
|
||||||
2:
|
2:
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
|
||||||
rsr a2, exccause
|
rsr a2, exccause
|
||||||
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
||||||
|
#endif
|
||||||
test_end
|
test_end
|
||||||
|
|
||||||
test ccompare_interrupt_masked_waiti
|
test ccompare_interrupt_masked_waiti
|
||||||
set_vector kernel, 2f
|
set_vector TIMER0_VECTOR, 2f
|
||||||
movi a2, 0
|
movi a2, 0
|
||||||
wsr a2, intenable
|
wsr a2, intenable
|
||||||
rsr a2, interrupt
|
rsr a2, interrupt
|
||||||
|
@ -247,8 +279,10 @@ test ccompare_interrupt_masked_waiti
|
||||||
waiti 0
|
waiti 0
|
||||||
test_fail
|
test_fail
|
||||||
2:
|
2:
|
||||||
|
#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
|
||||||
rsr a2, exccause
|
rsr a2, exccause
|
||||||
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
|
||||||
|
#endif
|
||||||
test_end
|
test_end
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in New Issue