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hw/i386/pc: Convert DPRINTF() to trace events

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Convert the deprecated DPRINTF() macro to trace events.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2019-12-13 11:50:57 +01:00 committed by Paolo Bonzini
parent ed9e923c3c
commit 4ca8dabdb8
2 changed files with 11 additions and 14 deletions
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19
hw/i386/pc.c
View File

@ -91,16 +91,7 @@
#include "config-devices.h" #include "config-devices.h"
#include "e820_memory_layout.h" #include "e820_memory_layout.h"
#include "fw_cfg.h" #include "fw_cfg.h"
#include "trace.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
#ifdef DEBUG_IRQ
#define DPRINTF(fmt, ...) \
do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
#else
#define DPRINTF(fmt, ...)
#endif
GlobalProperty pc_compat_4_2[] = {}; GlobalProperty pc_compat_4_2[] = {};
const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2); const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2);
@ -350,7 +341,7 @@ void gsi_handler(void *opaque, int n, int level)
{ {
GSIState *s = opaque; GSIState *s = opaque;
DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n); trace_pc_gsi_interrupt(n, level);
if (n < ISA_NUM_IRQS) { if (n < ISA_NUM_IRQS) {
qemu_set_irq(s->i8259_irq[n], level); qemu_set_irq(s->i8259_irq[n], level);
} }
@ -428,7 +419,7 @@ static void pic_irq_request(void *opaque, int irq, int level)
CPUState *cs = first_cpu; CPUState *cs = first_cpu;
X86CPU *cpu = X86_CPU(cs); X86CPU *cpu = X86_CPU(cs);
DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); trace_pc_pic_interrupt(irq, level);
if (cpu->apic_state && !kvm_irqchip_in_kernel()) { if (cpu->apic_state && !kvm_irqchip_in_kernel()) {
CPU_FOREACH(cs) { CPU_FOREACH(cs) {
cpu = X86_CPU(cs); cpu = X86_CPU(cs);
@ -762,7 +753,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
Port92State *s = opaque; Port92State *s = opaque;
int oldval = s->outport; int oldval = s->outport;
DPRINTF("port92: write 0x%02" PRIx64 "\n", val); trace_port92_write(val);
s->outport = val; s->outport = val;
qemu_set_irq(s->a20_out, (val >> 1) & 1); qemu_set_irq(s->a20_out, (val >> 1) & 1);
if ((val & 1) && !(oldval & 1)) { if ((val & 1) && !(oldval & 1)) {
@ -777,7 +768,7 @@ static uint64_t port92_read(void *opaque, hwaddr addr,
uint32_t ret; uint32_t ret;
ret = s->outport; ret = s->outport;
DPRINTF("port92: read 0x%02x\n", ret); trace_port92_read(ret);
return ret; return ret;
} }

6
hw/i386/trace-events
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@ -111,3 +111,9 @@ amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64
# vmport.c # vmport.c
vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p" vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p"
vmport_command(unsigned char command) "command: 0x%02x" vmport_command(unsigned char command) "command: 0x%02x"
# pc.c
pc_gsi_interrupt(int irqn, int level) "GSI interrupt #%d level:%d"
pc_pic_interrupt(int irqn, int level) "PIC interrupt #%d level:%d"
port92_read(uint8_t val) "port92: read 0x%02x"
port92_write(uint8_t val) "port92: write 0x%02x"