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target/arm: Use tcg_constant in disas_data_proc_2src 

Existing temp usage treats t1 as both zero and as a
temporary.  Rearrange to only require one temporary,
so remove t1 and rename t2.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-26 09:30:12 -07:00 committed by Peter Maydell
parent 728963ea97
commit 4cb05eb74c
1 changed files with 5 additions and 7 deletions
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12
target/arm/translate-a64.c
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@ -5734,15 +5734,13 @@ static void disas_data_proc_2src(DisasContext *s, uint32_t insn)
if (sf == 0 || !dc_isar_feature(aa64_mte_insn_reg, s)) {
goto do_unallocated;
} else {
TCGv_i64 t1 = tcg_const_i64(1);
TCGv_i64 t2 = tcg_temp_new_i64();
TCGv_i64 t = tcg_temp_new_i64();
tcg_gen_extract_i64(t2, cpu_reg_sp(s, rn), 56, 4);
tcg_gen_shl_i64(t1, t1, t2);
tcg_gen_or_i64(cpu_reg(s, rd), cpu_reg(s, rm), t1);
tcg_gen_extract_i64(t, cpu_reg_sp(s, rn), 56, 4);
tcg_gen_shl_i64(t, tcg_constant_i64(1), t);
tcg_gen_or_i64(cpu_reg(s, rd), cpu_reg(s, rm), t);
tcg_temp_free_i64(t1);
tcg_temp_free_i64(t2);
tcg_temp_free_i64(t);
}
break;
case 8: /* LSLV */