aspeed: Add memory property to Aspeed SoC
Multi-SoC machines can use this property to specify a memory container for each SoC. Single SoC machines will just specify get_system_memory(). Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220624003701.1363500-3-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -329,6 +329,8 @@ static void aspeed_machine_init(MachineState *machine)
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&error_abort);
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object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
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&error_abort);
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object_property_set_link(OBJECT(&bmc->soc), "memory",
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OBJECT(get_system_memory()), &error_abort);
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object_property_set_link(OBJECT(&bmc->soc), "dram",
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OBJECT(machine->ram), &error_abort);
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if (machine->kernel_filename) {
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@ -1336,6 +1338,8 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
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object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
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qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
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object_property_set_link(OBJECT(&bmc->soc), "memory",
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OBJECT(get_system_memory()), &error_abort);
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qdev_prop_set_uint32(DEVICE(&bmc->soc), "uart-default",
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amc->uart_default);
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qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
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@ -148,7 +148,6 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
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{
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AspeedSoCState *s = ASPEED_SOC(dev_soc);
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AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
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MemoryRegion *system_memory = get_system_memory();
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DeviceState *armv7m;
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Error *err = NULL;
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int i;
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@ -172,7 +171,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
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qdev_prop_set_string(armv7m, "cpu-type", sc->cpu_type);
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qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
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object_property_set_link(OBJECT(&s->armv7m), "memory",
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OBJECT(system_memory), &error_abort);
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OBJECT(s->memory), &error_abort);
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sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &error_abort);
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/* Internal SRAM */
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@ -181,7 +180,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(system_memory,
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memory_region_add_subregion(s->memory,
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sc->memmap[ASPEED_DEV_SRAM],
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&s->sram);
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@ -291,7 +291,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
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object_property_set_int(OBJECT(&s->cpu[i]), "cntfrq", 1125000000,
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&error_abort);
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object_property_set_link(OBJECT(&s->cpu[i]), "memory",
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OBJECT(get_system_memory()), &error_abort);
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OBJECT(s->memory), &error_abort);
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if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {
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return;
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@ -329,7 +329,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(get_system_memory(),
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memory_region_add_subregion(s->memory,
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sc->memmap[ASPEED_DEV_SRAM], &s->sram);
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/* DPMCU */
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@ -243,7 +243,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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/* CPU */
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for (i = 0; i < sc->num_cpus; i++) {
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object_property_set_link(OBJECT(&s->cpu[i]), "memory",
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OBJECT(get_system_memory()), &error_abort);
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OBJECT(s->memory), &error_abort);
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if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {
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return;
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}
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@ -256,7 +256,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(get_system_memory(),
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memory_region_add_subregion(s->memory,
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sc->memmap[ASPEED_DEV_SRAM], &s->sram);
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/* SCU */
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@ -456,6 +456,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
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}
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static Property aspeed_soc_properties[] = {
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DEFINE_PROP_LINK("memory", AspeedSoCState, memory, TYPE_MEMORY_REGION,
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MemoryRegion *),
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DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION,
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MemoryRegion *),
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DEFINE_PROP_UINT32("uart-default", AspeedSoCState, uart_default,
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@ -555,14 +557,14 @@ void aspeed_soc_uart_init(AspeedSoCState *s)
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int i, uart;
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/* Attach an 8250 to the IO space as our UART */
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serial_mm_init(get_system_memory(), sc->memmap[s->uart_default], 2,
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serial_mm_init(s->memory, sc->memmap[s->uart_default], 2,
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aspeed_soc_get_irq(s, s->uart_default), 38400,
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serial_hd(0), DEVICE_LITTLE_ENDIAN);
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for (i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) {
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if (uart == s->uart_default) {
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uart++;
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}
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serial_mm_init(get_system_memory(), sc->memmap[uart], 2,
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serial_mm_init(s->memory, sc->memmap[uart], 2,
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aspeed_soc_get_irq(s, uart), 38400,
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serial_hd(i), DEVICE_LITTLE_ENDIAN);
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}
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@ -604,7 +606,7 @@ bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp)
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0), -1000);
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}
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memory_region_add_subregion(get_system_memory(),
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memory_region_add_subregion(s->memory,
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sc->memmap[ASPEED_DEV_SDRAM], &s->dram_container);
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return true;
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}
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@ -49,6 +49,7 @@ struct AspeedSoCState {
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ARMCPU cpu[ASPEED_CPUS_NUM];
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A15MPPrivState a7mpcore;
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ARMv7MState armv7m;
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MemoryRegion *memory;
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MemoryRegion *dram_mr;
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MemoryRegion dram_container;
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MemoryRegion sram;
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