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target/ppc: Add two missing register callbacks on POWER10

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This patch adds tcg accessors for 2 SPRs which were missing on P10:

- the TBU40 register is used to write the upper 40 bits of the
timebase register. It is used by kvm to update the timebase when
entering/exiting the guest on P9 and above. The missing definition was
causing erratic decrementer interrupts in a pseries/kvm guest running
in a powernv10/tcg host, typically resulting in hangs.

- the missing DPDES SPR was found through code inspection. It exists
unchanged on P10.

Both existed on previous versions of the processor and a bit of git
archaeology hints that they were added while the P10 model was already
being worked on so they may have simply fallen through the cracks.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220411125900.352028-1-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Frederic Barrat 2022-04-11 14:59:00 +02:00 committed by Daniel Henrique Barboza
parent b34ce592fd
commit 4e610064db
1 changed files with 2 additions and 0 deletions
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2
target/ppc/cpu_init.c
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@ -6457,6 +6457,7 @@ static void init_proc_POWER10(CPUPPCState *env)
register_power5p_common_sprs(env);
register_power5p_lpar_sprs(env);
register_power5p_ear_sprs(env);
register_power5p_tb_sprs(env);
register_power6_common_sprs(env);
register_power6_dbg_sprs(env);
register_power8_tce_address_control_sprs(env);
@ -6467,6 +6468,7 @@ static void init_proc_POWER10(CPUPPCState *env)
register_power8_pmu_user_sprs(env);
register_power8_tm_sprs(env);
register_power8_pspb_sprs(env);
register_power8_dpdes_sprs(env);
register_vtb_sprs(env);
register_power8_ic_sprs(env);
register_power8_book4_sprs(env);