target-i386: Tidy gen_add_A0_im
Merge gen_op_addl_A0_im and gen_op_addq_A0_im into gen_add_A0_im and clean up the ifdef. Replace the one remaining user of gen_op_addl_A0_im with gen_add_A0_im. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1450379966-28198-10-git-send-email-rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -373,29 +373,12 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0, int reg)
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}
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}
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static inline void gen_op_addl_A0_im(int32_t val)
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{
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tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
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#ifdef TARGET_X86_64
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tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
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#endif
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}
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#ifdef TARGET_X86_64
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static inline void gen_op_addq_A0_im(int64_t val)
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{
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tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
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}
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#endif
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static void gen_add_A0_im(DisasContext *s, int val)
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{
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#ifdef TARGET_X86_64
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if (CODE64(s))
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gen_op_addq_A0_im(val);
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else
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#endif
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gen_op_addl_A0_im(val);
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tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
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if (!CODE64(s)) {
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tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
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}
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}
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static inline void gen_op_jmp_v(TCGv dest)
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@ -6229,7 +6212,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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exception */
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gen_op_jmp_v(cpu_T[0]);
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/* pop selector */
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gen_op_addl_A0_im(1 << dflag);
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gen_add_A0_im(s, 1 << dflag);
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gen_op_ld_v(s, dflag, cpu_T[0], cpu_A0);
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gen_op_movl_seg_T0_vm(R_CS);
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/* add stack offset */
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