target-sparc: implement UA2005 scratchpad registers
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
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@ -211,6 +211,7 @@
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#define ASI_AFSR 0x4c /* Async fault status register */
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#define ASI_AFAR 0x4d /* Async fault address register */
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#define ASI_EC_TAG_DATA 0x4e /* E-cache tag/valid ram diag acc */
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#define ASI_HYP_SCRATCHPAD 0x4f /* (4V) Hypervisor scratchpad */
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#define ASI_IMMU 0x50 /* Insn-MMU main register space */
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#define ASI_IMMU_TSB_8KB_PTR 0x51 /* Insn-MMU 8KB TSB pointer reg */
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#define ASI_IMMU_TSB_64KB_PTR 0x52 /* Insn-MMU 64KB TSB pointer reg */
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@ -523,6 +523,7 @@ struct CPUSPARCState {
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uint32_t gl; // UA2005
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/* UA 2005 hyperprivileged registers */
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uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
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uint64_t scratch[8];
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CPUTimer *hstick; // UA 2005
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/* Interrupt vector registers */
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uint64_t ivec_status;
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@ -1351,6 +1351,18 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
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}
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break;
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}
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case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
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if (unlikely((addr >= 0x20) && (addr < 0x30))) {
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/* Hyperprivileged access only */
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cpu_unassigned_access(cs, addr, false, false, 1, size);
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}
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/* fall through */
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case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
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{
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unsigned int i = (addr >> 3) & 0x7;
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ret = env->scratch[i];
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break;
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}
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case ASI_DCACHE_DATA: /* D-cache data */
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case ASI_DCACHE_TAG: /* D-cache tag access */
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case ASI_ESTATE_ERROR_EN: /* E-cache error enable */
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@ -1603,6 +1615,18 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
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case ASI_INTR_RECEIVE: /* Interrupt data receive */
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env->ivec_status = val & 0x20;
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return;
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case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
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if (unlikely((addr >= 0x20) && (addr < 0x30))) {
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/* Hyperprivileged access only */
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cpu_unassigned_access(cs, addr, true, false, 1, size);
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}
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/* fall through */
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case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
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{
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unsigned int i = (addr >> 3) & 0x7;
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env->scratch[i] = val;
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return;
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}
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case ASI_DCACHE_DATA: /* D-cache data */
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case ASI_DCACHE_TAG: /* D-cache tag access */
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case ASI_ESTATE_ERROR_EN: /* E-cache error enable */
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