Normalize header guard symbol definition

We commonly define the header guard symbol without an explicit value.
Normalize the exceptions.

Done with scripts/clean-header-guards.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-4-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Markus Armbruster 2022-05-06 15:49:10 +02:00
parent 9c0928045c
commit 4f31b54bfe
20 changed files with 20 additions and 20 deletions

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@ -9,7 +9,7 @@
*/
#ifndef EXEC_MEMOPIDX_H
#define EXEC_MEMOPIDX_H 1
#define EXEC_MEMOPIDX_H
#include "exec/memop.h"

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@ -23,7 +23,7 @@
*/
#ifndef TCG_LDST_H
#define TCG_LDST_H 1
#define TCG_LDST_H
#ifdef CONFIG_SOFTMMU

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@ -6,7 +6,7 @@
*/
#ifndef ALPHA_CPU_PARAM_H
#define ALPHA_CPU_PARAM_H 1
#define ALPHA_CPU_PARAM_H
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 13

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@ -6,7 +6,7 @@
*/
#ifndef ARM_CPU_PARAM_H
#define ARM_CPU_PARAM_H 1
#define ARM_CPU_PARAM_H
#ifdef TARGET_AARCH64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef CRIS_CPU_PARAM_H
#define CRIS_CPU_PARAM_H 1
#define CRIS_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 13

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@ -6,7 +6,7 @@
*/
#ifndef HPPA_CPU_PARAM_H
#define HPPA_CPU_PARAM_H 1
#define HPPA_CPU_PARAM_H
#ifdef TARGET_HPPA64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef I386_CPU_PARAM_H
#define I386_CPU_PARAM_H 1
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef M68K_CPU_PARAM_H
#define M68K_CPU_PARAM_H 1
#define M68K_CPU_PARAM_H
#define TARGET_LONG_BITS 32
/*

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@ -6,7 +6,7 @@
*/
#ifndef MICROBLAZE_CPU_PARAM_H
#define MICROBLAZE_CPU_PARAM_H 1
#define MICROBLAZE_CPU_PARAM_H
/*
* While system mode can address up to 64 bits of address space,

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@ -5,7 +5,7 @@
*/
#ifndef MIPS_CPU_PARAM_H
#define MIPS_CPU_PARAM_H 1
#define MIPS_CPU_PARAM_H
#ifdef TARGET_MIPS64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef NIOS2_CPU_PARAM_H
#define NIOS2_CPU_PARAM_H 1
#define NIOS2_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12

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@ -6,7 +6,7 @@
*/
#ifndef OPENRISC_CPU_PARAM_H
#define OPENRISC_CPU_PARAM_H 1
#define OPENRISC_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 13

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@ -6,7 +6,7 @@
*/
#ifndef PPC_CPU_PARAM_H
#define PPC_CPU_PARAM_H 1
#define PPC_CPU_PARAM_H
#ifdef TARGET_PPC64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef RISCV_CPU_PARAM_H
#define RISCV_CPU_PARAM_H 1
#define RISCV_CPU_PARAM_H
#if defined(TARGET_RISCV64)
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef S390_CPU_PARAM_H
#define S390_CPU_PARAM_H 1
#define S390_CPU_PARAM_H
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12

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@ -6,7 +6,7 @@
*/
#ifndef SH4_CPU_PARAM_H
#define SH4_CPU_PARAM_H 1
#define SH4_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12 /* 4k */

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@ -5,7 +5,7 @@
*/
#ifndef SPARC_CPU_PARAM_H
#define SPARC_CPU_PARAM_H 1
#define SPARC_CPU_PARAM_H
#ifdef TARGET_SPARC64
# define TARGET_LONG_BITS 64

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@ -6,7 +6,7 @@
*/
#ifndef TRICORE_CPU_PARAM_H
#define TRICORE_CPU_PARAM_H 1
#define TRICORE_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 14

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@ -6,7 +6,7 @@
*/
#ifndef XTENSA_CPU_PARAM_H
#define XTENSA_CPU_PARAM_H 1
#define XTENSA_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12

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@ -23,7 +23,7 @@
*/
#ifndef TCG_INTERNAL_H
#define TCG_INTERNAL_H 1
#define TCG_INTERNAL_H
#define TCG_HIGHWATER 1024