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pull-loongarch-20240125

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Merge tag 'pull-loongarch-20240125' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20240125

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* tag 'pull-loongarch-20240125' of https://gitlab.com/gaosong/qemu:
  target/loongarch/kvm: Enable LSX/LASX extension
  target/loongarch: Set cpuid CSR register only once with kvm mode

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2024-01-26 10:21:01 +00:00
commit 4f584163c0
2 changed files with 45 additions and 10 deletions
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1
linux-headers/asm-loongarch/kvm.h
View File

@ -79,6 +79,7 @@ struct kvm_fpu {
#define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT)) #define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
#define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG) #define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)
#define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG) #define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)
#define KVM_LOONGARCH_VCPU_CPUCFG 0
struct kvm_debug_exit_arch { struct kvm_debug_exit_arch {
}; };

54
target/loongarch/kvm/kvm.c
View File

@ -250,7 +250,7 @@ static int kvm_loongarch_get_csr(CPUState *cs)
return ret; return ret;
} }
static int kvm_loongarch_put_csr(CPUState *cs) static int kvm_loongarch_put_csr(CPUState *cs, int level)
{ {
int ret = 0; int ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); LoongArchCPU *cpu = LOONGARCH_CPU(cs);
@ -322,8 +322,11 @@ static int kvm_loongarch_put_csr(CPUState *cs)
ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_RVACFG), ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_RVACFG),
&env->CSR_RVACFG); &env->CSR_RVACFG);
ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CPUID), /* CPUID is constant after poweron, it should be set only once */
if (level >= KVM_PUT_FULL_STATE) {
ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CPUID),
&env->CSR_CPUID); &env->CSR_CPUID);
}
ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG1), ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG1),
&env->CSR_PRCFG1); &env->CSR_PRCFG1);
@ -537,6 +540,38 @@ static int kvm_loongarch_get_cpucfg(CPUState *cs)
return ret; return ret;
} }
static int kvm_check_cpucfg2(CPUState *cs)
{
int ret;
uint64_t val;
struct kvm_device_attr attr = {
.group = KVM_LOONGARCH_VCPU_CPUCFG,
.attr = 2,
.addr = (uint64_t)&val,
};
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
if (!ret) {
kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
env->cpucfg[2] &= val;
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) {
/* The FP minimal version is 1. */
env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, FP_VER, 1);
}
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LLFTP)) {
/* The LLFTP minimal version is 1. */
env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LLFTP_VER, 1);
}
}
return ret;
}
static int kvm_loongarch_put_cpucfg(CPUState *cs) static int kvm_loongarch_put_cpucfg(CPUState *cs)
{ {
int i, ret = 0; int i, ret = 0;
@ -545,14 +580,13 @@ static int kvm_loongarch_put_cpucfg(CPUState *cs)
uint64_t val; uint64_t val;
for (i = 0; i < 21; i++) { for (i = 0; i < 21; i++) {
if (i == 2) {
ret = kvm_check_cpucfg2(cs);
if (ret) {
return ret;
}
}
val = env->cpucfg[i]; val = env->cpucfg[i];
/* LSX and LASX and LBT are not supported in kvm now */
if (i == 2) {
val &= ~(BIT(R_CPUCFG2_LSX_SHIFT) | BIT(R_CPUCFG2_LASX_SHIFT));
val &= ~(BIT(R_CPUCFG2_LBT_X86_SHIFT) |
BIT(R_CPUCFG2_LBT_ARM_SHIFT) |
BIT(R_CPUCFG2_LBT_MIPS_SHIFT));
}
ret = kvm_set_one_reg(cs, KVM_IOC_CPUCFG(i), &val); ret = kvm_set_one_reg(cs, KVM_IOC_CPUCFG(i), &val);
if (ret < 0) { if (ret < 0) {
trace_kvm_failed_put_cpucfg(strerror(errno)); trace_kvm_failed_put_cpucfg(strerror(errno));
@ -598,7 +632,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
return ret; return ret;
} }
ret = kvm_loongarch_put_csr(cs); ret = kvm_loongarch_put_csr(cs, level);
if (ret) { if (ret) {
return ret; return ret;
} }