target/arm: only update pc after semihosting completes
Before we introduce blocking semihosting calls we need to ensure we can restart the system on semi hosting exception. To be able to do this the EXCP_SEMIHOST operation should be idempotent until it finally completes. Practically this means ensureing we only update the pc after the semihosting call has completed. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Keith Packard <keithp@keithp.com> Tested-by: Keith Packard <keithp@keithp.com>
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@ -130,6 +130,7 @@ void cpu_loop(CPUARMState *env)
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break;
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case EXCP_SEMIHOST:
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env->xregs[0] = do_arm_semihosting(env);
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env->pc += 4;
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break;
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case EXCP_YIELD:
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/* nothing to do here for user-mode, just resume guest code */
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@ -377,6 +377,7 @@ void cpu_loop(CPUARMState *env)
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break;
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case EXCP_SEMIHOST:
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env->regs[0] = do_arm_semihosting(env);
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env->regs[15] += env->thumb ? 2 : 4;
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break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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@ -8614,11 +8614,13 @@ static void handle_semihosting(CPUState *cs)
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"...handling as semihosting call 0x%" PRIx64 "\n",
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env->xregs[0]);
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env->xregs[0] = do_arm_semihosting(env);
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env->pc += 4;
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} else {
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qemu_log_mask(CPU_LOG_INT,
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"...handling as semihosting call 0x%x\n",
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env->regs[0]);
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env->regs[0] = do_arm_semihosting(env);
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env->regs[15] += env->thumb ? 2 : 4;
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}
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}
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#endif
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@ -2185,6 +2185,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
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"...handling as semihosting call 0x%x\n",
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env->regs[0]);
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env->regs[0] = do_arm_semihosting(env);
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env->regs[15] += env->thumb ? 2 : 4;
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return;
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case EXCP_BKPT:
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armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false);
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@ -1937,7 +1937,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
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break;
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}
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#endif
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
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} else {
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unsupported_encoding(s, insn);
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}
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@ -1124,7 +1124,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
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s->current_el != 0 &&
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#endif
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(imm == (s->thumb ? 0x3c : 0xf000))) {
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
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return;
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}
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@ -8457,7 +8457,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)
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!IS_USER(s) &&
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#endif
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(a->imm == 0xab)) {
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
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} else {
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gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false));
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}
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@ -10266,7 +10266,7 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a)
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!IS_USER(s) &&
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#endif
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(a->imm == semihost_imm)) {
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
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} else {
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gen_set_pc_im(s, s->base.pc_next);
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s->svc_imm = a->imm;
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