cris: Mask interrupts on dslots for CRISv10.

CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>

target-cris/translate_v10.c

@@ -1187,6 +1187,10 @@ static unsigned int crisv10_decoder(DisasContext *dc)
         dc->cpustate_changed = 1;
     }
 
+    /* CRISv10 locks out interrupts on dslots.  */
+    if (dc->delayed_branch == 2) {
+        cris_lock_irq(dc);
+    }
     return insn_len;
 }