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tests/tcg/loongarch64: Add fp comparison instructions test 

Choose some instructions to test:
- FCMP.cond.S
- cond: ceq clt cle cne seq slt sle sne

Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-8-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Song Gao 2022-07-16 16:54:25 +08:00 committed by Richard Henderson
parent 65cb15f4d6
commit 500cd33abb
2 changed files with 38 additions and 0 deletions
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1
tests/tcg/loongarch64/Makefile.target
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@ -13,5 +13,6 @@ LDFLAGS+=-lm
LOONGARCH64_TESTS = test_bit
LOONGARCH64_TESTS += test_div
LOONGARCH64_TESTS += test_fclass
LOONGARCH64_TESTS += test_fpcom
TESTS += $(LOONGARCH64_TESTS)

37
tests/tcg/loongarch64/test_fpcom.c Normal file
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@ -0,0 +1,37 @@
#include <assert.h>
#define TEST_COMP(N) \
void test_##N(float fj, float fk) \
{ \
int rd = 0; \
\
asm volatile("fcmp."#N".s $fcc6,%1,%2\n" \
"movcf2gr %0, $fcc6\n" \
: "=r"(rd) \
: "f"(fj), "f"(fk) \
: ); \
assert(rd == 1); \
}
TEST_COMP(ceq)
TEST_COMP(clt)
TEST_COMP(cle)
TEST_COMP(cne)
TEST_COMP(seq)
TEST_COMP(slt)
TEST_COMP(sle)
TEST_COMP(sne)
int main()
{
test_ceq(0xff700102, 0xff700102);
test_clt(0x00730007, 0xff730007);
test_cle(0xff70130a, 0xff70130b);
test_cne(0x1238acde, 0xff71111f);
test_seq(0xff766618, 0xff766619);
test_slt(0xff78881c, 0xff78901d);
test_sle(0xff780b22, 0xff790b22);
test_sne(0xff7bcd25, 0xff7a26cf);
return 0;
}