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specialize the power save code for 7x0 CPUs 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1671 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2005-11-26 20:15:14 +00:00
parent 6f5a9f7e56
commit 50443c98e4
4 changed files with 19 additions and 4 deletions
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4
cpu-exec.c
View File

@ -265,11 +265,11 @@ int cpu_exec(CPUState *env1)
}
}
#elif defined(TARGET_PPC)
if (env1->msr[MSR_POW]) {
if (env1->halted) {
if (env1->msr[MSR_EE] &&
(env1->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER))) {
env1->msr[MSR_POW] = 0;
env1->halted = 0;
} else {
return EXCP_HALTED;
}

2
monitor.c
View File

@ -257,7 +257,7 @@ static void do_info_cpus(void)
term_printf(" (halted)");
#elif defined(TARGET_PPC)
term_printf(" nip=0x" TARGET_FMT_lx, env->nip);
if (msr_pow)
if (env->halted)
term_printf(" (halted)");
#endif
term_printf("\n");

2
target-ppc/cpu.h
View File

@ -495,6 +495,8 @@ struct CPUPPCState {
CPU_COMMON
int halted; /* TRUE if the CPU is in suspend state */
int access_type; /* when a memory exception occurs, the access
type is stored here */

15
target-ppc/helper.c
View File

@ -807,6 +807,8 @@ void do_compute_hflags (CPUPPCState *env)
void do_store_msr (CPUPPCState *env, target_ulong value)
{
int enter_pm;
value &= env->msr_mask;
if (((value >> MSR_IR) & 1) != msr_ir ||
((value >> MSR_DR) & 1) != msr_dr) {
@ -846,8 +848,19 @@ void do_store_msr (CPUPPCState *env, target_ulong value)
msr_ri = (value >> MSR_RI) & 1;
msr_le = (value >> MSR_LE) & 1;
do_compute_hflags(env);
if (msr_pow) {
enter_pm = 0;
switch (PPC_EXCP(env)) {
case PPC_FLAGS_EXCP_7x0:
if (msr_pow == 1 && (env->spr[SPR_HID0] & 0x00E00000) != 0)
enter_pm = 1;
break;
default:
break;
}
if (enter_pm) {
/* power save: exit cpu loop */
env->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit();
}