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target/loongarch: Fix CSR.DMW0-3.VSEG check 

The previous code checks whether the highest 16 bits of virtual address
equal to that of CSR.DMW0-3. This is incorrect according to the spec,
and is corrected to compare only the highest four bits instead.

Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230614065556.2397513-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Jiajie Chen 2023-06-14 14:55:56 +08:00 committed by Song Gao
parent f332388365
commit 505aa8d8f2
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GPG Key ID: 40A2FFF239263EDF
1 changed files with 2 additions and 2 deletions
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4
target/loongarch/tlb_helper.c
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@ -185,10 +185,10 @@ static int get_physical_address(CPULoongArchState *env, hwaddr *physical,
}
plv = kernel_mode | (user_mode << R_CSR_DMW_PLV3_SHIFT);
base_v = address >> TARGET_VIRT_ADDR_SPACE_BITS;
base_v = address >> R_CSR_DMW_VSEG_SHIFT;
/* Check direct map window */
for (int i = 0; i < 4; i++) {
base_c = env->CSR_DMW[i] >> TARGET_VIRT_ADDR_SPACE_BITS;
base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW, VSEG);
if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) {
*physical = dmw_va2pa(address);
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;